A configurable multiplex data transfer model for asynchronous and heterogeneous FPGA accelerators on single DMA device

Huang, Zhilong; Zhang, Shuo; Gao, Han; Zhang, Xiaobo; Yang, Shengqi

doi:10.1016/j.micpro.2020.103174

Microprocessors and Microsystems

2020

DOI: 10.1016/j.micpro.2020.103174

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A configurable multiplex data transfer model for asynchronous and heterogeneous FPGA accelerators on single DMA device

Zhilong Huang

Shuo Zhang

Han Gao

et al.

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A configurable multiplex data transfer model for asynchronous and heterogeneous FPGA accelerators on single DMA device

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References 34 publications

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