A configurable SoC design for information security

Xuan, Sizhong; Han, Jianda; Yu, Zhou; Ren, Yi; Zeng, Xiaoyang

doi:10.1109/asicon.2015.7516998

Cited by 1 publication

(1 citation statement)

References 5 publications

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“…Hash algorithms (such as SHA-1, SHA-256, and SM3) are mainly used to generate a message digest with a fixed length. A configurable SoC with built-in FPGA logic gates that can achieve multiple algorithms for AES and DES is proposed in [13]. A SoC is developed in [14], which can be used in the field of mobile security, but it does not apply to the IoT due to its size and power constraints.…”

Section: Introductionmentioning

confidence: 99%

An Easy-to-Integrate IP Design of AHB Slave Bus Interface for the Security Chip of IoT

Yuan

Zheng

Rao

et al. 2021

Mathematical Problems in Engineering

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Information security is fundamental to the Internet of things (IoT) devices, in which security chip is an important means. This paper proposes an Advanced High-performance Bus Slave Control IP (AHB-SIP), which applies to cryptographic accelerators in IoT security chips. Composed by four types of function registers and AHB Interface Control Logic (AICL), AHB-SIP has a simple and easy-to-use structure. The System on Chip (SoC) design can be realized by quickly converting the nonstandard interface of the security module to the AHB slave interface. AHB-SIP is applied to the security accelerators of SM2, SM3, and SM4 and random number generator (RNG). Combined with a low-power embedded CPU, TIMER, UART, SPI, IIC, and other communication interfaces, a configurable SoC can be integrated. Moreover, SMIC 110 nm technology is employed to tape out the SoC on a silicon chip. The area of AHB-SIP is 0.072 mm2, only occupying 6‰ of the chip (3.45 ∗ 3.45 mm2), and the power consumption of encryption modules combined with AHB-SIP is lower than that combined with AXI interface, which is decreased up to 61.0% and is ideal for the application of IoT.

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Section: Introductionmentioning

confidence: 99%