A Content Adapted FPGA Memory Architecture with Pattern Recognition Capability for L1 Track Triggering in the LHC Environment

Harbaum, Tanja; Seboui, M.; Balzer, M.; Becker, J.; Weber, M.

doi:10.1109/fccm.2016.52

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Cited by 13 publications

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“…Alternative approaches for track finding on FPGAs are employed in other high energy physics experiments. In [6] an FPGA based content associative memory architecture is proposed to be used for pattern recognition in the upcoming LHC Upgrade. In this approach tracks suitable for readout are predefined beforehand and stored in pattern banks.…”

Section: Related Workmentioning

confidence: 99%

A neural network on FPGAs for the z-vertex track trigger in Belle II

Baehr¹,

Skambraks²,

Neuhaus³

et al. 2017

J. Inst.

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Background originating from events outside of the interaction point is going to play a major role in the upcoming Belle II experiment. In order to reduce this background a track trigger based on the reconstruction of an event's z position is employed on FPGAs. This paper presents the architecture and implementation of neural networks and supporting preprocessing that is going to be used at the upcoming cosmic ray test of Belle II. By using hit information from simulations, figures of merit like latency and resource demand are presented.

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Section: Related Workmentioning

confidence: 99%