A Control-Chart-Based Method for Solder Joint Crack Detection

Abstract

AbstractÀMany researchers have used different failure criteria in published solder joint reliability studies. Since the reported timeto-failure would be different if different failure criteria were used, it would be difficult to compare the reported reliability life of solder joints from one study to another. The purpose of this study is to evaluate the effect of failure criteria on the reported thermal fatigue life and determine which failure criterion could detect failure sooner. First, the application of the control-chart-based method in a thermal cycling reliability study is described. The reported time-to-failure data were then compared based on four different failure criteria: a control-chart-based method, a 20% resistance increase from IPC-9701A, a resistance threshold of 500 V, and an infinite resistance. Over 3.5 GB resistance data measured by data loggers from a low-silver solder joint reliability study were analyzed. The results show that estimated time-to-failure based on the control-chart-based method is very similar to that when the IPC-9701A failure criterion is used. Both methods detected failure much earlier than the failure criterion of a resistance threshold of 500 V or an infinite resistance. A scientific explanation is made of why the 20% increase in IPC-9701A is a reasonable failure criterion and why the IPC-9701A and the control-chart-based method produced similar results. Three different stages in resistance change were identified: stable, crack, and open. The duration of the crack stage depends on the severity of the test conditions. It is recommend the control-chart-based method be used as the failure criterion because it not only monitors the average of resistance, but also monitors the dispersion of resistance in each thermal cycle over time.

A Digital On-Line Monitor for Detecting Intermittent Resistance Faults at Board Level

“…Several methods have been used traditionally for testing interconnects at the board level such as DC resistance measurements, 6 radio-frequency (RF) impedance analysis 7,8 Built-in Self-Test (BIST) 9 and analog neural network technology. 10 DC resistance measurements 6 is a useful method to detect stuck-at short, stuck-at open and bridge faults in interconnections at test mode. However, for detecting small impedance changes in interconnections, RF analysis is more e®ective.…”

“…Therefore, the conventional test methods are highly unlikely to detect these faults. Furthermore, even if one is able to evoke an IRF during the test phase, very accurate equipment at high frequencies such as data logger, 6 vector network analyzer, 7,8 and analog neural network 10 are needed to detect brief IRFs. Therefore, since IRF may remain undetected during a test phase, an in situ on-line monitoring technique should be used to detect such faults when they become active while a system is in operational mode.…”

A Study on Electrical Reliability Criterion on Through Silicon Via Packaging

“…Reasons for using a specific criterion were hardly found in the literatures, except the 10% of relative resistance change used by Frank et al [15] since they claimed that circuits are generally designed to work with a maximum 10% on resistor-capacitor delay. Furthermore, Pan explained why 20% resistance increase is a reasonable criterion for their experiments according to the control chart theory by considering size and material properties of their test samples [34]. To study the effects of criterion itself on TSV structures, several reliability tests on packaging with TSV chains were performed, and the experimental data were statistically analyzed through different but commonly used criterions on resistance increase.…”

Design and verification of embedded instruments for detecting intermittent resistive faults in electronic systems

“…Several methods have been used traditionally for testing interconnections at the board level, such as DC resistance measurements [Pan14], radio-frequency (RF) impedance analysis [Kwo11], [Loe12], Built-in Self-Test [Hof10] and analogue neural network technology [Ste08]. DC resistance measurements [Pan14] is a valuable method to detect stuck-at-short, stuck-at-open and bridge faults in interconnections at test mode. However, for detecting small impedance changes in interconnections, RF analysis is more effective [Kwo11].…”

“…Therefore, the conventional test methods are implausible in detecting these faults. Furthermore, even if one can evoke an IRF during the test phase, very accurate equipment at high frequencies such as data logger [Pan14], vector network analyser [Kwo11,Loe12], and analogue neural network [Ste08] are needed to detect brief IRFs. Therefore, since IRF may remain undetected during a test phase, the in-situ on-line monitoring technique should be used to detect such faults when they become active while a system is in operational mode.…”