A CRC-Based Concurrent Fault Detection Architecture for Galois/Counter Mode (GCM)

Geran, Amir Ali Kouzeh; Reyhani-Masoleh, Arash

doi:10.1109/arith.2016.19

Cited by 3 publications

(1 citation statement)

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“…Many schemes have improved the processing speed and hardware efficiency of a parallel CRC [5][6][7]. Therefore, in high-speed systems that use CRCs for error detection such as wired Ethernet (IEEE 802.3), wireless fidelity (WiFi) (IEEE 802.11), and worldwide interoperability for microwave access (WiMAX) (IEEE 802.16) [8][9][10], the parallel CRC implementation is more attractive (for example, a parallel CRC is used to detect faults for Galois/counter mode as employed in wireless standards including WiFi and WiMAX [11]).…”

Section: Introductionmentioning

confidence: 99%

Scheme for periodical concurrent fault detection in parallel CRC circuits

Liu

Reviriego

et al. 2020

IET Computers & Digital Techniques

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As technology scales down, circuits are more prone to incur in faults and fault detection is necessary to ensure the system reliability. However, fault-detection circuits are also vulnerable to stuck-at faults due to, for example, manufacturing defects or ageing; a fault can cause an incorrect output in the fault-detection scheme; so concurrent fault detection is, therefore, needed. Cyclic redundancy checks (CRCs) are widely used to detect errors in many applications, for example, they are used in communication to detect errors on transmitted frames. In this study, an efficient method to implement concurrent fault detection for parallel CRC computation is proposed. The scheme relies on using a serial CRC computation circuit that is used to periodically check the results obtained from the main module to detect the faults. This introduces a lower circuit overhead than existing schemes. All CRC encoders and decoders that implement the CRC computation in parallel can employ the proposed scheme to detect faults.

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