A DC-Link Capacitor Voltage Ripple Reduction Method for a Modular Multilevel Cascade Converter With Single Delta Bridge Cells

Tanaka, Takaaki; Wang, Huai; Blaabjerg, Frede

doi:10.1109/tia.2019.2934024

Cited by 21 publications

(4 citation statements)

References 21 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The proper design of the dc-link capacitor depends on the accurate estimates of its voltage and current ripples. The values of these ripples are dependent on the pulse width modulation (PWM) switching method [18][19][20][21][22][23][24][25]. Obtaining the peak rms current ripple in the dc-link capacitor using computation method is introduced in references [18,19].…”

Section: Introductionmentioning

confidence: 99%

“…The maximum voltage ripple must be considered when sizing the dc-link capacitor, especially when the equivalent series resistance of the capacitor is low, and the smaller value of the capacitor is consequently enough to manage ripple current stress. The dc-link capacitor voltage ripple reduction methods for multilevel converter are discussed in references [23,24]. In reference [25], calculation of VSIs' dc-link voltage ripple considering reverse recovery of antiparallel diodes is displayed.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Mathematical Design and Analysis of Three-Phase Inverters: Different Wide Bandgap Semiconductor Technologies and DC-Link Capacitor Selection

2023

View full text Add to dashboard Cite

This paper introduces a mathematical design and analysis of three-phase inverters used in electric drive applications such as aerospace, electric vehicles, and pumping applications. Different wide bandgap (WBG) semiconductor technologies are considered in this analysis. Using SiC MOSFETs and Si IGBTs, two drive systems are developed in order to show the improvement in the efficiency of the inverter. The efficiency, total losses of the drive systems and the power losses of two inverters are computed and compared for both drive systems at the same operating condition. The drive system with SiC MOSFET shows much better performance compared to the drive system with Si IGBT. The SiC MOSFET system provides a 59.39%, 86.13%, and 29.76% lower conduction losses, switching losses and drive’s total losses, respectively, compared to the Si IGBT system. The efficiency of the SiC MOSFET system is 2.46%pu higher than the efficiency of the Si IGBT drive system. Moreover, this paper introduces a detailed analysis for the dc-link voltage and current ripples in three-phase inverters. Furthermore, the minimal dc-link capacitor needed to deal with the ripple current and voltage is investigated. Finally, the performance of the drive with Si IGBT is experimentally tested under different operating speeds and loads.

show abstract

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Mathematical Design and Analysis of Three-Phase Inverters: Different Wide Bandgap Semiconductor Technologies and DC-Link Capacitor Selection

2023

View full text Add to dashboard Cite

show abstract

“…As observed, most of the papers discuss methods to reduce the low frequency ripple in the cell voltage of MMC topology. However, Tanaka, Wang and Blaabjerg [19] investigates the effect of the THCCI on the capacitor ripple reduction and the electrothermal stresses on insulated gate bipolar transistor modules in Delta-CHB topology. This work explores the injection of 0 to 1 pu (capacitive operation) of third harmonic current and analyzes the power losses for these conditions.…”

Section: Introductionmentioning

confidence: 99%

Delta-CHB Statcom with Reduced Capacitance Through Third Harmonic Injection

Mendonca¹,

Callegari²,

Cupertino³

et al. 2023

Eletrônica de Potência

View full text Add to dashboard Cite

This work investigates the third harmonic circulating current injection in delta-connected Cascaded H-Bridge (Delta-CHB) STATCOM, aiming the cell capacitance volume reduction. Firstly, analytical expressions for capacitor voltage ripple are derived without and with third harmonic injection. These expressions are used to obtain the third harmonic current waveform which minimizes the sum of capacitor voltages ripple in the whole operation range. These expressions are validated in an experimental setup based on 620 VA/220 V cell. Although this approach minimizes the ripple, an increase in the semiconductors current effort is expected. This paper quantifies the increase through analytical expressions and proposes an improved third-harmonic injection scheme which injects the third harmonic in a range of operating points. The performance of the proposed strategy is evaluated for a 17 MVA/13.8 kV Delta-CHB STATCOM with 24 cells per cluster. The results indicate a reduction of 17.2% in the theoretical cell capacitance. A physical realization of cell capacitor reveals that the proposed scheme, in the best scenario, reduces the volume in 25%. Finally, if the same power module and heatsink are employed, the proposed scheme leads to an increase in junction temperature of 13◦C for IGBT and diode.

show abstract

“…Note that the definition in (5.3) guarantees that the grid currents i a , i b and i c are not affected by the circulating current i circ (e.g., i a = i arm−ab − i arm−ca is independent on i circ ). However, the circulating current does affect the instantaneous capacitor voltages, according to (5.2), thus providing a degree of freedom to achieve interphase (cluster) balancing (as discussed in Subsection 4.3.2.3 and in [28,70]), among other objectives such as capacitor voltage ripple reduction and battery current ripple suppression [84,85]. For this reason, injecting circulating current represents an attractive solution to shape the capacitor voltages in a way that overmodulation is prevented for all the inductive operation range.…”

Section: Authorship Attribution Statementmentioning

confidence: 99%

Fast and safe control of low-capacitance static compensators with enhanced inductive operation

Rodriguez¹

View full text Add to dashboard Cite

Jurong Innovation District (Level 2 Lab). I also analyzed the data. All experiment, including set-up design and testing, was conducted by me, with the supervision of Dr. Hossein Dehghani Tafti.  Ph.D. candidate Lian Gaowen helped extend the proposed concept to the MMC topology. He carried out simulations and helped prepare the literature review for the IFEEC conference manuscript.  Prof Ramon Leyva guided the interpretation of the problem from his background in control.  Prof Christopher David Townsend and Sergio Vazquez provided alternative solutions and directions for the problem, thus helping to improve and extend the initial idea.  Prof Josep Pou organized several group meetings to help me spread the ideas and results obtained, trying to generate discussions that could result in new ideas and directions.

show abstract

A DC-Link Capacitor Voltage Ripple Reduction Method for a Modular Multilevel Cascade Converter With Single Delta Bridge Cells

Cited by 21 publications

References 21 publications

Mathematical Design and Analysis of Three-Phase Inverters: Different Wide Bandgap Semiconductor Technologies and DC-Link Capacitor Selection

Mathematical Design and Analysis of Three-Phase Inverters: Different Wide Bandgap Semiconductor Technologies and DC-Link Capacitor Selection

Delta-CHB Statcom with Reduced Capacitance Through Third Harmonic Injection

Fast and safe control of low-capacitance static compensators with enhanced inductive operation

Contact Info

Product

Resources

About