A Deep Neural Network Accelerator using Residue Arithmetic in a Hybrid Optoelectronic System

Abstract

The acceleration of Deep Neural Networks (DNNs) has attracted much attention in research. Many critical real-time applications benefit from DNN accelerators but are limited by their compute-intensive nature. This work introduces an accelerator for Convolutional Neural Network (CNN), based on a hybrid optoelectronic computing architecture and residue number system (RNS). The RNS reduces the optical critical path and lowers the power requirements. In addition, the wavelength division multiplexing (WDM) allows high-speed operation at the system level by enabling high-level parallelism. The proposed RNS compute modules use one-hot encoding and thus enable fast switching between the electrical and optical domains. We propose a new architecture that combines residue electrical adders and optical multipliers as the matrix-vector multiplication unit. Moreover, we enhance the implementation of different CNN computational kernels using WDM-enabled RNS based integrated photonics. The area and power efficiency of the proposed accelerator are 0.39 TOPS/s/mm 2 and 3.22 TOPS/s/W, respectively. In terms of computation capability, the proposed chip is 12.7x and 4.02x better than other optical implementation and memristor implementation, respectively. Our experimental evaluation using DNN benchmarks illustrates that our architecture can perform on average more than 72 times faster than GPU under the same power budget.

An Electro-Photonic System for Accelerating Deep Neural Networks

“…Analog GEMM is well-explored in the literature. Previous works leveraged photonics [1][2][3][4][5][6][7] , crossbar arrays consisting of resistive RAM [8][9][10][11][12] , switched capacitors 13,14 , PCM cells 15 , STT-RAM 16,17 , etc.…”

“…The slow-down in CMOS technology scaling, along with these increasing demands has led analog DNN accelerators to gain significant research interest. Recent research has been focused on using various analog technologies such as photonic cores [1][2][3][4][5][6][7] , resistive arrays [8][9][10][11][12] , switched capacitor arrays 13,14 , Phase Change Materials (PCM) 15 , Spin-Transfer Torque (STT)-RAM 16,17 , etc., to enable highly parallel, fast, and efficient matrix-vector multiplications * E-mail: cansu@bu.edu (MVMs) in the analog domain. These MVMs are fundamental components used to build larger general matrixmatrix multiplication (GEMM) operations, which make up more than 90% of the operations in DNN inference and training 18 .…”

Photonics Multiply-Accumulation Computations System Based on Residue Arithmetic

“…35 In addition, we show how a neural network can be built on top of the photonic RNS units. 7,36 Here, we present the experimental results of the photonic multiply accumulate computation chip based on residue arithmetic, combining RNS with photonic adders and multipliers. The integration of RNS with photonic computation offers several primary advantages:…”

Photonic tensor core machine learning accelerator

“…To address this issue, a number of new materials, highperformance devices, and computing paradigms have been developed . Among many, optical computing has shown important progress thanks to the almost unlimited bandwidth, the high energy efficiency in performing MAC operations, and the high integration [60][61][62][63][64][65]. Particularly in recent years, numerous architectures have been put forth that conduct multiplication and accumulation by taking use of the electromagnetic nature of light traveling in nanoscale structures [66][67][68][69][70][71][72][73][74][75][76][77][78][79][80][81].…”