Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007
DOI: 10.1145/1228784.1228868
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A design methodology for space-time adapter

Abstract: This paper presents a solution to efficiently explore the design space of communication adapters. In most digital signal processing (DSP) applications, the overall architecture of the system is significantly affected by communication architecture, so the designers need specifically optimized adapters. By explicitly modeling these communications within an effective graphtheoretic model and analysis framework, we automatically generate an optimized architecture, named Space-Time AdapteR (STAR). Our design flow i… Show more

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Cited by 2 publications
(1 citation statement)
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“…The COMU allows to interface the HW-ACC with its environment. It includes buffers, a synchronization processor and an operation memory which allow to have a GALS / LIS communication interface [12] [14]. As described in Figure 2, GAUT first translates the initial specification during the compilation step into a Data Flow Graph (DFG) according to the designer directives: (1) designer can in-line function calls by using standard inline keyword in the initial specification; (2) designer can also keep function not in-lined (in that case, the DFG contains hierarchical nodes symbolizing the function calls).…”
Section: Gautoverviewmentioning
confidence: 99%
“…The COMU allows to interface the HW-ACC with its environment. It includes buffers, a synchronization processor and an operation memory which allow to have a GALS / LIS communication interface [12] [14]. As described in Figure 2, GAUT first translates the initial specification during the compilation step into a Data Flow Graph (DFG) according to the designer directives: (1) designer can in-line function calls by using standard inline keyword in the initial specification; (2) designer can also keep function not in-lined (in that case, the DFG contains hierarchical nodes symbolizing the function calls).…”
Section: Gautoverviewmentioning
confidence: 99%