A design of full-CMOS VDSL2 receiver in 0.25&amp;#x03BC;m CMOS process

Kim, Young-Shin; Pu, YoungGun; Kim, Tai-Young; Cho, Hoohyun; Ko, Dong Hyuk; Lee, Kang-Yoon; Tai-hyung, kim; Lee, Joon-Beom

doi:10.1109/socdc.2008.4815640

Cited by 1 publication

(2 citation statements)

References 3 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The receiver is composed of a 13-bit ADC, a VGA, a high-pass filter, and a low-pass filter with tuning circuit [5]. The ADC operates at the sampling rate of 80 Msps and is designed to have the resolution of 13-bits to guarantee the SNR.…”

Section: System Architecturementioning

confidence: 99%

See 1 more Smart Citation

A 67.5 dB SFDR Full-CMOS VDSL2 CPE Transmitter and Receiver with Multi-Band Low-Pass Filter

Park¹,

Park²,

Pu³

et al. 2010

JSTS:Journal of Semiconductor Technology and Science

Self Cite

View full text Add to dashboard Cite

Abstract-This paper presents a full-CMOS transmitter and receiver for VDSL2 systems. The transmitter part consists of the low-pass filter, programmable gain amplifier (PGA) and 14-bit DAC. The receiver part consists of the low-pass filter, variable gain amplifier (VGA), and 13-bit ADC. The low pass filter and PGA are designed to support the variable data rate. The RC bank sharing architecture for the low pass filter has reduced the chip size significantly. And, the 80 Msps, high resolution DAC and ADC are integrated to guarantee the SNR. Also, the transmitter and receiver are designed to have a wide dynamic range and gain control range because the signal from the VDSL2 line is variable depending on the distance. The chip is implemented in 0.25 m CMOS technology and the die area is 5 mm × 5 mm. The spurious free dynamic range (SFDR) and SNR of the transmitter and receiver are 67.5 dB and 41 dB, respectively. The power consumption of the transmitter and receiver are 160 mW and 250 mW from the supply voltage of 2.5 V, respectively.

show abstract

Section: System Architecturementioning

confidence: 99%

“…Also, its DC offset should be cancelled [11]. Cm ccont1] ccont [5] (c) work, to minimize the pass-band ripple, the amplifier characteristic and capacitor and resistor value are optimized. Resistor banks and capacitor banks are used for the multi-band low pass filter.…”

Section: Low-pass Filter Of Receivermentioning

confidence: 99%