A novel ultra low-voltage, low-power basebandprocessor for UHF radio frequency identification (RFID) tag is presented here. The baseband-processor is compatible with the EPC TM class-1 generation-2 (C1G2) UHF RFID protocol, and fits the requirements of ultra lowpower of passive tags. Based on the analysis of the special power consumption of the tag, a new architecture is proposed. A novel scheme for generating pseudo-random numbers as well as a new method of partial-decoding is developed. Besides, other low-power techniques are also adopted for the special baseband-processor which implements complex functions, such as encoding/coding, anticollision and authorization scheme, and reading/writing operation to EEPROM. The chip was fabricated in 0.35 mm 1P3M standard CMOS process. Experimental results show that it achieves low power operation of 3.15 mW @ 1.5 V with the core area of 1.1 mm 6 0.8 mm.