A design platform for analog device size sensitivity analysis and visualization

“…Designers have been dealing with such analytical relations mostly by experience, rather than by using simulation tools [8]. The circuit robustness against process parameter variability may be characterised through the circuit sensitivity to design parameter.…”

Section: Lc-vco Optimized Physical Design Variablesmentioning

confidence: 99%

“…As the number of elements in a circuit grows, analytical analysis becomes unfeasible either due to the complex relation between parameters or to the device models. In this case, the strategy adopted in recent publications is a symbolic calculation method based on binary decision diagram or graph-pair decision diagram [20]- [22].…”

Section: (4)mentioning

confidence: 99%

“…The circuit robustness against process parameter variability may be characterised through the circuit sensitivity to design parameter. The benefit of sensitivity analysis is to offer the availability of an analytical function for one or more circuit parameters as well as the possibility to understand which parameter/device has a stronger or weaker influence on the circuit performance [8] and [9].…”

Section: Lc-vco Optimized Physical Design Variablesmentioning

confidence: 99%

“…According to [20], for a set of design parameters depending on a process variable, the circuit sensitivity can be computed by the following equation…”

Section: Fig 5 Process Variables Impact On Inductor Quality Factor mentioning

confidence: 99%

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Optimization-Based Design of Nano-CMOS LC-VCOs

Pereira

Fino

Coito

et al. 2012

Technological Innovation for Value Creation

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Abstract. This paper introduces a variability-aware methodology for the design of LC-VCOs in Nano-CMOS technologies. The complexity of the design as well as the necessity for having an environment offering the possibility for exploring design trade-offs has led to the development of design methodologies based multi-objective optimization procedures yielding the generation of Pareto-optimal surfaces. The efficiency of the process is granted by using analytical models for both passive and active devices. Although physics-based analytical expressions have been proposed for the evaluation of the lumped elements, the variability of the process parameters is usually ignored due to the difficulty to formalize it into an optimization performance index. The usually adopted methodology of considering only optimum solutions for the Pareto surface, may lead to pruning quasi-optimal solutions that may prove to be better, should their sensitivity to process parameter variation be accounted for. In this work we propose starting by generating an extended Pareto surface where both optimum and quasi-optimum solutions are considered. Finally information on the sensitivity to process parameter variations, is used for electing the best design solution.

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A survey on binary decision diagram approaches to symbolic analysis of analog integrated circuits

Shi

2011

Analog Integr Circ Sig Process

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A design platform for analog device size sensitivity analysis and visualization

Cited by 11 publications

References 13 publications

A hybrid approach for the sensitivity analysis of integrated inductors

A hybrid approach for the sensitivity analysis of integrated inductors

Optimization-Based Design of Nano-CMOS LC-VCOs

A survey on binary decision diagram approaches to symbolic analysis of analog integrated circuits

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