A Design Strategy to Improve Machine Learning Resiliency for Ring Oscillator Physically Unclonable Function

Abstract

Physically unclonable functions (PUFs) are hardware security primitives that utilize nonreproducible manufacturing variations to provide device-specific challenge-response pairs (CRPs). Such primitives are desirable for applications such as communication and intellectual property protection. PUFs have been gaining considerable interest from both the academic and industrial communities because of their simplicity and stability. However, many recent studies have exposed PUFs to machine-learning (ML) modeling attacks. To improve the resilience of a system to general ML attacks instead of a specific ML technique, a common solution is to improve the complexity of the system. Structures, such as XOR-PUFs, can significantly increase the nonlinearity of PUFs to provide resilience against ML attacks. However, an increase in complexity often results in an increase in area and/or a decrease in reliability. This study proposes a lightweight ring oscillator (RO)-based PUFs using an additional modulus process to improve ML resiliency. The idea was to increase the complexity of the RO-PUF without significant hardware overhead by applying a modulus process to the outcomes from the RO frequency counter. We also present a thorough investigation of the design space to balance ML resiliency and other performance metrics such as reliability, uniqueness, and uniformity.

Era of Sentinel Tech: Charting Hardware Security Landscapes Through Post-Silicon Innovation, Threat Mitigation and Future Trajectories

“…The suggested hn-CRO PUF is validated by Monte Carlo simulation findings achieved using UMC 65 nm technology with a compact RRAM model [205]. A suggested modular modulus technique aims to enhance the resilience of machine learning attacks while addressing the constraints of scalability and controllability [206]. Because they feature a restricted quantity of CRPs, memory-based PUFs are categorized as weak PUFs.…”

“…This approach is applied to RO-PUF. Another solution, the alternating modulus ring oscillator PUF (AMRO-PUF), aims to balance ML resilience and reliability, enhancing security against modelling attacks with minimal area overhead [206]. Logic Locking is the other twig of hardware security performs with various attacks like Satisfiable Attacks (SAT), Key Sensitization attacks (KSA), Hill climbing attacks, ATPG-based analysis, Removal or Bypass attacks, SAIL, SURF, SWEEP attacks, and others aim to conduct either structural or functional analyses to undermine locked designs.…”