A diagnosis method of analog parts of mixed-signal systems controlled by microcontrollers

Czaja, Zbigniew

doi:10.1016/j.measurement.2006.07.015

Cited by 14 publications

(6 citation statements)

References 8 publications

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“…To make the fault diagnosis method effective, the number K of voltage samples -assuming the occurrence of single soft faults in the ACUT -should be at least 2 [6]. In order to obtain an optimal localization resolution, at the same time keeping a moderate size of the fault dictionary, K = 3 was chosen.…”

Section: The Measurement Proceduresmentioning

confidence: 99%

“…The pulse duration determined with the susceptibility analysis method [6,7] for the ACUT (Fig. 2) is equal to T = 2.1 ms, i.e.…”

Section: The Measurement Proceduresmentioning

confidence: 99%

“…Similarly to other methods of that class, the fault detection and fault localization consist in placing a measurement point in the measurement space ( Fig. 8) and then checking its location in relation to the family of localization curves [6,7].…”

Section: The Fault Dictionarymentioning

confidence: 99%

“…The BCT8244A is used to generate a square pulse stimulating the tested analog circuit, whereas the ADC -to measure the parameters of this circuit's time response to this stimulation, e.g. as in [6,7]. Such an approach enables detection of faults as well as localization of a single soft fault of passive components of the tested analog circuit, e.g.…”

Section: Introductionmentioning

confidence: 99%

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A testing method of analog parts of mixed-signal electronic systems equipped with the IEEE1149.1 test bus

Czaja¹

2016

ELECTROTECHNICAL REVIEW

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A new solution of the JTAG BIST for testing analog circuits in mixed-signal electronic microsystems controlled by microcontrollers and equipped with the IEEE1149.1 bus is presented. It is based on a new fault diagnosis method in which an analog circuit is stimulated by a buffered signal from the TMS line, and the time response of the circuit to this signal is sampled by the ADC equipped with the JTAG. The method can be used for fault detection and single soft fault localization in an analog tested circuit (A testing method of analog parts of mixed-signal electronic systems equipped with the IEEE1149.1 test bus). Streszczenie. Przedstawiono nowe rozwiązanie testera JTAG BIST przeznaczonego do testowania torów analogowych w mieszanych sygnałowo mikrosystemach elektronicznych sterowanych mikrokontrolerami i wyposażonych w magistralę testującą IEEE1149.1 (JTAG). Bazuje ona na nowej metodzie diagnostycznej, w której tor analogowy pobudzany jest buforowanym sygnałem z linii TMS, a odpowiedź czasowa tego toru na ten sygnał jest próbkowana przez przetwornik A/C wyposażony w interfejs JTAG. Metoda ta pozwala na detekcję i lokalizację pojedynczych uszkodzeń parametrycznych w analogowym układzie badanym (Metoda testowania części analogowych analogowo-cyfrowych systemów elektronicznych wyposażonych w magistralę testującą IEEE1149.1).

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Section: The Measurement Proceduresmentioning

confidence: 99%

“…The pulse duration determined with the susceptibility analysis method [6,7] for the ACUT (Fig. 2) is equal to T = 2.1 ms, i.e.…”

Section: The Measurement Proceduresmentioning

confidence: 99%

Section: The Fault Dictionarymentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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A testing method of analog parts of mixed-signal electronic systems equipped with the IEEE1149.1 test bus

Czaja¹

2016

ELECTROTECHNICAL REVIEW

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“…There are several methods addressing this problem [5,6]. However, one the most commonly used is Monte Carlo analysis [5,6,[11][12][13][14]. Not only it provides means to analyse the influence of circuit parameters values influence in the effective natural way, but also allows for determining ambiguity sets, i.e.…”

Section: Gpf Model Of Integrated Circuitmentioning

confidence: 99%

Evolutionary algorithms for global parametric fault diagnosis in analogue integrated circuits

Jantos¹,

Grzechca²,

Rutkowski³

2012

Bulletin of the Polish Academy of Sciences: Technical Sciences

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Abstract. An evolutionary method for analogue integrated circuits diagnosis is presented in this paper. The method allows for global parametric faults localization at the prototype stage of life of an analogue integrated circuit. The presented method is based on the circuit under test response base and the advanced features classification. A classifier is built with the use of evolutionary algorithms, such as differential evolution and gene expression programming. As the proposed diagnosis method might be applied at the production phase there is a method for shortening the diagnosis time suggested. An evolutionary approach has been verified with the use of several exemplary circuits -an oscillator, a band-pass filter and two operational amplifiers. A comparison of the presented algorithm and two classical methods -the linear classifier and the nearest neighborhood method -proves that the heuristic approach allows for acquiring significantly better results.

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A method of fault diagnosis of analog parts of electronic embedded systems with tolerances

Czaja¹

2009

Measurement

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A diagnosis method of analog parts of mixed-signal systems controlled by microcontrollers

Cited by 14 publications

References 8 publications

A testing method of analog parts of mixed-signal electronic systems equipped with the IEEE1149.1 test bus

A testing method of analog parts of mixed-signal electronic systems equipped with the IEEE1149.1 test bus

Evolutionary algorithms for global parametric fault diagnosis in analogue integrated circuits

A method of fault diagnosis of analog parts of electronic embedded systems with tolerances

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