Abstract:IntroductionThe need of high power converter, and the growth of modern power semiconductor switches such as power MOSFET and IGBTs boost the research interest in power converters such as multilevel voltage source inverters (MVSI) and its dual circuit, multilevel current source inverters (MCSI). They are capable to generate a high output power with lower gradient voltage or current, and higher quality of output waveforms resulting in less EMI noise and smaller size of output filter required by the converter A c… Show more
“…These carrier signals have the same frequency, the same phase and the same peak-to-peak amplitude. The carrier signals frequency sets the switching frequency of power switches used in the inverter [29], [30]. The waveform V m is the sinusoidal modulating signal.…”
<p>A new dead-time compensation method of power inverter circuits is suggested and presented in this paper. The proposed method utilizes carrier based sinusoidal pulse width modulation technique to produce driving signals of the inverter power switches with dead-time correction capability. The proposed method able to eliminate dead-time effects such as reducing the waveform distortion of the inverter output current, and increasing the fundamental component amplitude of output current. An analysis of the proposed method is presented. Some computer simulations were carried out to investigate the principle operation, and to test performance of the new method. The developed method was validated through experimental test of H-bridge voltage source inverter circuits. The data obtained from the computer simulation and prototype experiments have confirmed that that the proposed method worked well compensating the dead-time in the voltage source power inverter circuits.</p>
“…These carrier signals have the same frequency, the same phase and the same peak-to-peak amplitude. The carrier signals frequency sets the switching frequency of power switches used in the inverter [29], [30]. The waveform V m is the sinusoidal modulating signal.…”
<p>A new dead-time compensation method of power inverter circuits is suggested and presented in this paper. The proposed method utilizes carrier based sinusoidal pulse width modulation technique to produce driving signals of the inverter power switches with dead-time correction capability. The proposed method able to eliminate dead-time effects such as reducing the waveform distortion of the inverter output current, and increasing the fundamental component amplitude of output current. An analysis of the proposed method is presented. Some computer simulations were carried out to investigate the principle operation, and to test performance of the new method. The developed method was validated through experimental test of H-bridge voltage source inverter circuits. The data obtained from the computer simulation and prototype experiments have confirmed that that the proposed method worked well compensating the dead-time in the voltage source power inverter circuits.</p>
“…Figure 1 shows the circuit configuration of the DC power module used in the inverter circuits, and its typical output waveform [5], [11]. Figure 2 shows the circuit configuration of the five-level inverter obtained using the proposed method.…”
“…The modulating signals utilize two sinusoidal waveforms with opposite phase. The frequency of the modulating signals (the reference sinusoidal waveforms) determines the fundamental frequency of the output voltage waveform, whereas the frequency of carrier waveforms sets the switching frequency of inverter's controlled switches [1], [5], [11], [12]. The PWM modulation technique used in the proposed inverter is shown in Figure 6.…”
“…three-level inverter circuits has been widely used in industrial and traction drive. The requirement of many capacitors in the flying capacitor multilevel inverter leads complexity in the controller for balancing the capacitor's voltages of the inverter [5]. Some hybrid topologies of multilevel inverter have been proposed in order to eliminate some drawbacks of the three main inverter topologies previously discussed.…”
This paper presents a circuit configuration of five-level PWM voltage-source inverter developed from the three-level H-bridge inverter using only a single DC input power source. In the proposed five-level inverter, an auxiliary circuits working as the voltage balancing circuits of the inverter's DC capacitors is presented. The auxiliary circuits work to keep stable DC capacitor voltages of the inverter, and also to reduce the capacitor size of the inverter. The unique point of the proposed balancing circuits is that it needs only a single voltage sensor to control the voltages of the two capacitors in the inverter. Moreover, a minimum number the inverter's switching devices is also an important feature of the proposed inverter topology. A simple proportional integral controller is applied to control the voltage of the DC capacitors. The proposed topology is tested through computer simulation using PSIM software. Laboratory experimental tests were also conducted to verify the proposed inverter circuits. The computer simulation and experimental test results showed that the proposed balancing circuits works properly keeping stable voltages across the two DC capacitors of the inverter using only a single voltage sensor. The inverter also works well to synthesize a five-level PWM voltage waveform with sinusoidal load current.
“…This paper applied carrier based PWM techniques to the CHB-MLI by using multiple carrier waveforms and a sinusoidal reference wave form [10][11][12]. The number of carrier waveforms required to produce Y level output is (x-1), where x is the number of carrier waveforms [8].…”
Section: Types Of Carrier Based Spwm Techniquesmentioning
This paper proposes a switching control for a cascaded H-bridge inverter structure with reduced switches which is used to improve the THD performance of a single phase five level CHB MLI. The multi level inverter is simulated for the conventional carrier overlapping APOD and the proposed carrier overlapping APOD pulse width modulation (PWM) switching control technique. The total harmonic distortion (THD) of the output voltages are observed for both PWM control techniques. The performance of the symmetric CHB MLI is simulated using MATLAB/Simulink. It is observed that the proposed carrier overlapping APODPWM provides output with relatively low THD as compared to the conventional carrier overlapping APODPWM.
Keyword:Multi-level inverter APODPWM THD MATLAB/Simulink
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