2018 31st Symposium on Integrated Circuits and Systems Design (SBCCI) 2018
DOI: 10.1109/sbcci.2018.8533247
|View full text |Cite
|
Sign up to set email alerts
|

A Distributed Functional Verification Environment for the Design of System-on-Chip in Heterogeneous Architectures

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1

Citation Types

0
1
0

Year Published

2020
2020
2020
2020

Publication Types

Select...
1

Relationship

0
1

Authors

Journals

citations
Cited by 1 publication
(1 citation statement)
references
References 18 publications
0
1
0
Order By: Relevance
“…Unfortunately, these models lack any easy extensions for integration with heterogeneous systems, and their adaptation to diverse hardware platforms, synchronization and communication protocols require much effort. Authors in [19] attempted to support synchronization and heterogeneity by involving different computation patterns and integrating realtime hardware devices in Ptolemy using high-level architecture. This was an improvement to the integration of several instances of Ptolemy to improve performance without HIL [20].…”
Section: Introductionmentioning
confidence: 99%
“…Unfortunately, these models lack any easy extensions for integration with heterogeneous systems, and their adaptation to diverse hardware platforms, synchronization and communication protocols require much effort. Authors in [19] attempted to support synchronization and heterogeneity by involving different computation patterns and integrating realtime hardware devices in Ptolemy using high-level architecture. This was an improvement to the integration of several instances of Ptolemy to improve performance without HIL [20].…”
Section: Introductionmentioning
confidence: 99%