2011
DOI: 10.1007/s00202-011-0215-5
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A DSP based power factor correction converter to reduce total harmonic distortion of input current for improvement of power quality

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Cited by 19 publications
(14 citation statements)
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“…When a converter operates in buck or boost regime, the signal v i is delivered through a non-linear compensation block defined by (12) or (13), which are shown in the 'controller' area in Fig. 3.…”
Section: Non-linear Compensationmentioning
confidence: 99%
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“…When a converter operates in buck or boost regime, the signal v i is delivered through a non-linear compensation block defined by (12) or (13), which are shown in the 'controller' area in Fig. 3.…”
Section: Non-linear Compensationmentioning
confidence: 99%
“…The integrated chargers' configurations can be divided into two major categories: Singlephase [1,2,6,[8][9][10][11] or three-phase fast-integrated chargers [1][2][3][4]12]. The integrated converters are connected to the main grid, so it is necessary that they are working with the possibility of power factor (PF) correction as is discussed in [13][14][15], where the authors paid attention to digitalised algorithms. Researchers have studied integrated non-isolated single-stage chargers that combine ac-dc rectifiers and the propulsion machine's dc-dc converter.…”
Section: Introductionmentioning
confidence: 99%
“…This is due to minimum number of semiconductor switches in the current path at any instant of operation which is two [26]. This topology is composed of two single-phase boost converters without input rectifier as used in other PFC circuits [27], [28]. The mathematical model of the converter during positive half cycle of ac input voltage is given in (1) and (2).…”
Section: The Analiysis Of Power Factor Correction Convertermentioning
confidence: 99%
“…Reducing of the current THD in the digitally controlled PFC boost converters can be done by using different techniques such as, the passive harmonic filters connecting in parallel with the input side, this technique can be used to reduce the THD in case of the low switching frequency PFC converters, however in case of the high frequency PFC converters where the EMI filters connecting in the input side of the converters, reliability of the passive filters to decrease the THD is very low due to the difficulty of the tuning of the filter's resonance frequency with the presence of the EMI filters [19]. Digital current filters such as finite response impulse (FIR), and infinite impulse response (IIR) filters can be optimally designed and used to moderate the feedback digital current signals for the inner current control loops to reduce the current error and hence reducing the current distortion, using of the adaptive FIR filter to reduce the THD of the CCM-bridgeless PFC converter was proposed in [20].…”
Section: Introductionmentioning
confidence: 99%
“…Another widely used technique to reduce the THD in PFC converters is the variable on-time (VOT) switching control technique by optimized the duty cycle of the PFC converter to decrease zero crossing distortion (ZCD) period [20][21][22][23], VOT switching control technique is reliable to reduce the THD in PFC converter but with complex mathematical analysis of the converter operation around the zero-crossing point in order to optimize the exact dead time around the zero-crossing point for exact on-time switching prediction [24]. This paper presents the small signal stability modeling of the conventional PFC boost converter proposed, and based on the signal stability model, an optimal integral-proportional (IP) current controller consists of double loop control strategy, where the integral gain feed forward to return the inductor current back to the reference set point, and the proportional gain implemented in the feedback path to increase the controller response.…”
Section: Introductionmentioning
confidence: 99%