A dynamic CTA scheduling scheme for massive parallel computing

Son, Dong Oh; Thuan, Cong; Choi, Hyung Do; Nam, Ji-Seung; Kim, Cheol Hong

doi:10.1007/s10586-017-0768-9

Cited by 7 publications

(1 citation statement)

References 15 publications

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“…A typical GPU comprises multiple streaming multiprocessors (SMs), or compute units (CUs) as commonly referred by AMD, also known as shader cores [4,5]. SMs are layouted in groups called clusters that share a common port to the interconnection network.…”

Section: Introductionmentioning

confidence: 99%

Architecture exploration of recent GPUs to analyze the efficiency of hardware resources

Kim

2021

Bulletin EEI

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This study analyzes the efficiency of parallel computational applications with the adoption of recent graphics processing units (GPUs). We investigate the impacts of the additional resources of recent architecture on the popular benchmarks compared with previous architecture. Our simulation results demonstrate that Pascal GPU architecture improves the performance by 273% on average compared to old-fashioned Fermi architecture. To evaluate the performance improvement depending on specific hardware resources, we divide the hardware resources into two types: computing and memory resources. Computing resources have bigger impact on performance improvement than memory resources in most of benchmarks. For Hotspot and B+ tree, the architecture adopting only enhanced computing resources can achieve similar performance gains of the architecture adopting both computing and memory resources. We also evaluate the influence of the number of warp schedulers in the SM (Streaming Multiprocessor) to the GPU performance in relationship with barrier waiting time. Based on these analyses, we propose the development direction for the future generation of GPUs.

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Section: Introductionmentioning

confidence: 99%