A Dynamic Range Enhanced Readout Technique with a  Two-Step TDC for High Speed Linear CMOS Image Sensors

Gao, Zhiyuan; Yang, Congjie; Xu, Jiangtao; Nie, Kaiming

doi:10.3390/s151128224

Cited by 7 publications

(2 citation statements)

References 23 publications

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“…The row driver circuit is used to transmit the global reset signal (RST), electric charge transfer control signal (FS), row reset signal (RST1), and row selection control signal (Row). The pixel unit is 5T pixels [24], including an electric charge injection transistor (M1), a global reset transistor (M2), a row selection control transistor (M5), and a source follower (SF). In addition, it also includes a photo-diode (Iph), an electric charge transfer transistor (M3), a row reset transistor (M4), and an adaptive capacitor.…”

Section: Adaptive Capacitor Infrared Image Sensor Structurementioning

confidence: 99%

High Dynamic Pixel Structure Based on an Adaptive Integrating Capacitor

Liu,

Guo,

et al. 2023

Sensors

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Infrared image sensing technology has received widespread attention due to its advantages of not being affected by the environment, good target recognition, and high anti-interference ability. However, with the improvement of the integration of the infrared focal plane, the dynamic range of the photoelectric system is difficult to improve, that is, the restrictive trade-off between noise and full well capacity is particularly prominent. Since the capacitance of the inversion MOS capacitor changes with the gate–source voltage adaptively, the inversion MOS capacitor is used as the capacitor in the infrared pixel circuit, which can solve the contradiction between noise in low light and full well capacity in high light. To this end, a highly dynamic pixel structure based on adaptive capacitance is proposed, so that the capacitance of the infrared image sensor can automatically change from 6.5 fF to 37.5 fF as the light intensity increases. And based on 55 nm CMOS process technology, the performance parameters of an infrared image sensor with a 12,288 × 12,288 pixel array are studied. The research results show that a small-size pixel of 5.5 µm × 5.5 µm has a large full well capacity of 1.31 Me− and a variable conversion gain, with a noise of less than 0.43 e− and a dynamic range of more than 130 dB.

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Section: Adaptive Capacitor Infrared Image Sensor Structurementioning

confidence: 99%

High Dynamic Pixel Structure Based on an Adaptive Integrating Capacitor

Liu,

Guo,

et al. 2023

Sensors

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“…Thanks to the advantage of high speed and massive integration available with CMOS scaling, a modern sensor with monolithic integrated TDC has become a preferred approach [ 13 , 14 ]. Fast digital switching capability allows extracting fine time resolution and TDCs are realized using deep-submicron CMOS [ 15 , 16 ].…”

Section: Introductionmentioning

confidence: 99%

A Cyclic Vernier Two-Step TDC for High Input Range Time-of-Flight Sensor Using Startup Time Correction Technique

Nguyen

Duong

Chung

et al. 2018

Sensors

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Herein, we present a low-power cyclic Vernier two-step time-to-digital converter (TDC) that achieves a wide input range with good linearity. Since traditional approaches require a large area or high power to achieve an input range >300 ns, we solve this problem by proposing a simple yet efficient TDC suitable for time-of-flight (TOF) sensors. In previous studies using the cyclic structure, the effect of startup time on the linearity of the TDC is not described. Thus, the achievable linearity has been limited when the TDC is used for applications requiring a high input range. We solve this problem by using a simple yet effective technique to compensate. The proposed technique is realized using (1) digitally-controlled oscillators (DCOs) that have dual frequency control and matched startup time; (2) an alignment detector that performs startup time correction by proper timing control; and (3) a fully symmetric arbiter that precisely detects the instant of edge alignment. To achieve a fine resolution for the cyclic Vernier TDC, we design two closely-matched DCOs with dual frequency control. The alignment detector performs the critical task of cancelling startup time via timing control. The detector is delay-compensated by using a dummy to provide matched loading for the two DCOs. To enhance the detection speed under low power, a current-reuse approach is employed for the arbiter. The TDC is fabricated using a 0.18 μm complementary metal–oxide–semiconductor (CMOS) process in a compact chip area of 0.028 mm2. Measured results show a dynamic range of 355 ns and a resolution of 377 ps. When the result is applied for TOF sensing, it corresponds to a distance range of 53.2 m and a resolution of 5.65 cm. Over a relatively large input range, good linearity is achieved, which is indicated by a DNL of 0.28 LSBrms and an INL of 0.96 LSBrms. The result corresponds to root mean square (RMS) error distance of 5.42 cm. The result is achieved by consuming a relatively low power of 0.65 mW.

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