This paper proposes a method of constructing first‐ and second‐order switched‐capacitor variable all‐pass circuits that have small total capacitance and are parasitic‐insensitive. A first‐order circuit, in which the peak group delay at zero angular frequency can be specified by using a programmable capacitor array, and a second‐order circuit that has a first‐order subcircuit, in which the peak bandpass group delay and the corresponding angular frequency (peak angular frequency) can be specified independently, have already been presented. Those constructions, however, have the problem that the capacitance spread is generally enlarged in the first‐order circuit (defined here as the maximum capacitance when the minimum capacitance is normalized to 1). This increases the total capacitance in both the first‐ and second‐order circuits and makes the second‐order circuit parasitic‐sensitive. This paper, on the other hand, proposed circuits that are parasitic‐insensitive and have smaller total capacitances than the circuits proposed in the past. The second‐order circuit proposed in the past also has the problem that the peak angular frequency cannot be set higher than half the Nyquist angular frequency, but this is possible in the proposed second‐order circuit. Another point is that the number of operational amplifiers is reduced by one in the proposed circuit. The calculated amplitude element‐sensitivities of the first‐ and second‐order circuits are smaller than the past values. The proposed circuit was experimentally constructed using discrete components, and a satisfactory result was obtained. © 1999 Scripta Technica, Electron Comm Jpn Pt 3, 82(10): 50–62, 1999