A Fast Online Task Placement Algorithm for Three-Dimensional Dynamic Partial Reconfigurable Devices

Abstract

Three-dimensional (3D) integration technology provides a great opportunity for reconfigurable devices to increase device performance. Nevertheless, there is no efficient data structure and task placement algorithm to manage 3D dynamic partial reconfigurable (DPR) resources in literature. Inefficient algorithms limit the performance of 3D DPR devices. This study addresses the issue of the 3D task placement problem via a novel data structure named Maximal Empty Cuboid (MEC) list, which is proposed to manage the unoccupied space on the 3D DPR device. No matter if a task is assigned or removed on the device, the MEC list is updated in real-time to record 3D unoccupied resources so that the online task placement can be executed in a shorter time. Experiments are carried out to evaluate the performance of the proposed task placement algorithm, and results demonstrate that the proposed algorithm can make a reduction of at least 39% in terms of the task rejection ratio verifying the algorithm's efficiency. INDEX TERMS Online task placement algorithm, three-dimensional, dynamic partial reconfigurable devices, maximal empty cuboid.

Multi-Shape Task Placement Algorithm Based on Low Fragmentation Resource Management on 2D Heterogeneous Dynamic Partial Reconfigurable Devices

“…The QC strategy is highly efficient since the strategy searches candidates in the corner corresponding to the size of the new task to find the available location for the task, rather than traversing the entire resource matrix. However, the limited search candidates may cause a targeted task cannot find an unoccupied location even though there is enough space to accommodate the new task [16]. This is an algorithm that sacrifices the quality of placement in exchange for speed.…”

“…Programmable resources in the unoccupied internal area get wasted because they are treated as occupied resources according to the rectangular task model so that blocking the possibility of the space being assigned to other tasks. On the other hand, most existing approaches [10], [12]- [16], [19] consider that the DPR device only contains one kind of programmable resource: CLB. However, to improve the computing performance, the recent DPR device architectures (e.g., Xilinx 7 Series FPGAs, Zynq-7000 SoC, etc.)…”

“…Rejection ratio ( ) is proposed to evaluate the task placement quality. The equation to calculate the rejection ratio is shown as follows [16]:…”