A Fault Analysis in Reversible Sequential Circuits

Abstract

Abstract-In this paper, the researchers propose the design of reversible circuits using reversible gates. Reversible logic is implemented in reversible circuits. Reversible logic is mostly preferred due to less heat dissipation. Conservative logic gates can be designed in any sequential circuits and can be tested using two test vectors. The significance of proposed work lies in the design of reversible sequential circuits and their equivalent circuits for maximum fault coverage. The design of reversible sequential circuits using Toffoli gate and Peres gate is proposed in this literature. The design of Toffoli and Peres equivalent circuits is proposed first time in this literature, in order to achieve maximum fault coverage. The proposed Toffoli and Peres gates surpass the Fredkin gate and MXCQCA gate in terms of area, number of gates and timing. The simulation and coding is performed using cadence tool.

Using homing, synchronizing and distinguishing input sequences for the analysis of reversible finite state machines

“…Specifically, the impact of the three above introduced sequences has not been studied at all for RFSMs and for the FSMs embedded in RFSMs. Some studies into testability have been performed from the classical point of view such as in [37].…”