Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign &Amp; System Synthesis - CODES+ISS 2003
DOI: 10.1145/944691.944694
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A fault model notation and error-control scheme for switch-to-switch buses in a network-on-chip

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Cited by 40 publications
(21 citation statements)
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“…Hamming codes are the most widely used codes in previous research on interconnect link error protection [184][189] [190] [191][192] [194]. As mentioned earlier, the minimum distance of a Hamming code is 3, so it can correct a single error in each codeword.…”
Section: Case Study and Comparison With Prior Workmentioning
confidence: 99%
See 1 more Smart Citation
“…Hamming codes are the most widely used codes in previous research on interconnect link error protection [184][189] [190] [191][192] [194]. As mentioned earlier, the minimum distance of a Hamming code is 3, so it can correct a single error in each codeword.…”
Section: Case Study and Comparison With Prior Workmentioning
confidence: 99%
“…Hamming codes can enhance the burst error tolerance of the larger codeword and also tolerate multiple errors (provided each error occurs in a separate group) [194], [209].…”
Section: Case Study and Comparison With Prior Workmentioning
confidence: 99%
“…It is obvious that test data cannot be corrupted if the error correction scheme is capable to fully recover the error. However, the associated cost of such techniques (e.g., forward error correction [27]) in terms of area and energy-efficiency is quite high and hence retransmission scheme is the mainstream technique utilized nowadays. Also, even for the case when single error correction is employed, since the probability of a double (or higher) error within a single flit may not be insignificant due to crosstalk, typically a hybrid technique that provide both error correction and retransmission is utilized [23].…”
Section: The Impact Of Fault Tolerance Schemes On Test Reliabilitymentioning
confidence: 99%
“…While other NoCs like [6,7,10] make use of relatively lean protocols, the NoC used in DynaCORE utilises a three-layer protocol stack. The decision for a more complex protocol was made, because processing instances should be relocatable, there should be support for prioritised traffic, and a future expansion of the DynaCORE implementation to multiple FPGAs should be taken into account.…”
Section: Protocol Stackmentioning
confidence: 99%