A fault‐tolerant modular multilevel inverter topology

Abstract

Multilevel inverter topologies have received an increasing importance for their modular structures with better integration of renewable energy sources and reduced filtering requirements. But reliability is compromised in the process of decreasing the number of switches to produce the maximum number of voltage levels. This paper elevates a single-phase fault-tolerant inverter topology, which is modular in structure. The proposed inverter is analyzed for open-or short-circuit faults in sources and open-circuit faults in switches. Sine Pulse Width Modulation with multicarriers technique is used to control the circuit. The carrier signals are reconfigured under fault conditions based on levels to be generated by bypassing the faulted switch or source. The circuit is simulated in MATLAB/SIMULINK, and experimental setup is developed to claim the fault tolerance of proposed inverter.

Development of fault‐tolerant reduced device version with switched‐capacitor based multilevel inverter topologies

“…In the modified SPFT topology the multicarrier sinusoidal PWM (SPWM) scheme is used as shown in Figure 7. In the present work, the firing pulses are obtained from the level‐shifting (LS‐PWM) technique to generate sine modulated PWM pulses to operate power switching devices 9 . To generate “ N ” level output, the LS‐PWM strategy requires, “ N‐1 ” triangular carrier signals with switching (Carrier) frequency of ( f S = 3150 Hz ).…”

“…Normally, SCFs are catastrophic faults that are hard to handle and might cause serious damage to other parts of the system. The SCF may be caused by local thermal runaway or high temperature, dynamic latch‐up, incorrect gate drive signals or certain other types of devices and layout defects 9 . In the case of an SCF, a shutdown is recommended in place of system reconfiguration.…”

Resilient multilevel inverter topology with improved reliability

“…The topologies proposed in [15–33] utilise redundant leg and external switches/relays to make the topology as fault tolerant. The main drawback of those topologies is that external switches or redundant leg have zero percentage utilisation under healthy operation.…”

“…Moreover, it requires a higher number of conducting switches either in healthy or faulty operation, resulting in lower reliability. A nine‐level fault‐tolerant MLI topology with 16 semiconductor switches and 4 dc sources has been proposed in [27, 28]. The major drawback is the requirement of a higher number of conducting switches to generate a particular voltage level, which results in low efficiency.…”

A new structure of three‐phase five‐level inverter with nested two‐level cells

“…Multilevel inverters (MLIs) are an attractive solution for various medium‐voltage applications such as industrial drives, FACTs, HVDC, and renewable energy sources . They are also extended for low‐power applications due to the benefits of reduced device stress, electromagnetic interference, and filter size with a capability to synthesize the sinusoidal output voltage waveform with improved harmonic spectrum as compared with the two‐level inverters . The emergence of MLIs started with the discovery of three topologies, namely, (a) diode‐clamped converter (DCC), (b) flying capacitor converter (FCC), and (c) cascaded H‐bride converter (CHBC) .…”