A flexible and low-cost open-source IPMC mezzanine for ATCA boards based on OpenIPMC

We present the recent developments in the context of the OpenIPMC project, which proposes a free and open-source Intelligent Platform Management Controller (IPMC) software and an associated controller mezzanine card for use in ATCA electronic boards. We discuss our experience in the operation of OpenIPMC on prototype boards designed for the upgrades of particle physics experiments at CERN and we show the addition of new features and support for new protocols in the firmware of the controller mezzanine card.

Section: Openipmc and Its Contextmentioning

confidence: 99%

Novel developments on the OpenIPMC project

Calligaris,

Dell'Aquila,

Grossi Bassi

et al. 2024

“…The second portion of the service area contains what is needed to meet the specific requirements of the ATCA standard. This includes an Intelligent Platform Management Controller (IPMC) named OpenIPMC in the DIMM form-factor [6], Zone-2 backplane connections, the necessary input power modules designed to harness the dual −48 V shelf power source, and an Ethernet switch that allows connecting up to seven endpoints. The payload area is responsible for processing data with a high throughput and low latency.…”

Section: Board Overviewmentioning

confidence: 99%

Lessons learned while developing the Serenity-S1 ATCA card

Mehner,

Ardila-Perez,

Balzer

et al. 2024

Self Cite

The Serenity-S1 is a production-optimised Advanced Telecommunications Computing Architecture (ATCA) processing blade based on the AMD Xilinx Virtex Ultrascale+ device. It incorporates many developments from the Serenity-A and Serenity-Z prototype cards and, where possible, adopts solutions being used across CERN. Due to the shortage of components during the recent semiconductor crisis, commonly used components in the prototypes had to be replaced by new ones after qualification. In this work, we discuss various improvements to simplify manufacturing, the performance of new components, some of the more difficult aspects of procurement, the performance of production-grade Samtec 25 Gb/s optical firefly parts, and concerns regarding the rack cooling infrastructure.

“…The ATCA carrier [5] hosts four MMB cards. The carrier board is designed using the OpenIPMC DIMM [7], which uses the JEDEC MO-244 low profile form factor employed in several ATCA cards at CERN [8][9][10]. The OpenIPMC acts as board controller [11] according to the PICMG specifications [12].…”

Section: Development Of the Off-detector Readout Electronicsmentioning

confidence: 99%

The data acquisition system for the PANDA Micro-Vertex Detector

Manzhura,

Caselle,

Ardila-Perez

et al. 2024

Self Cite

The PANDA (antiProton ANnihilation at DArmstadt) experiment will study the strong interaction in annihilation reactions between an antiproton beam and a stationary cluster jet target. The PANDA detector will be composed of several sub-detectors designed for tracking, particle identification and calorimetry. The Micro-Vertex Detector (MVD) is the innermost part of the tracking system surrounding the interaction region, which is designed for precise vertex and tracking detection. It consists of silicon pixel and double-sided microstrip detectors. For the readout of the microstrip sensors an ASIC called ToASt (Torino Asic for Strip readout) is being developed in 0.11 μm CMOS technology at INFN Turin. The ASIC takes advantage of both Time-over-Threshold and Time-of-Arrival methods to accurately measure the event's energy and timestamp. To sustain the acquisition of the microstrip sensors a MDC (Module Data Concentrator) ASIC is under development at KIT. Up to eight ToASt front-ends' data streams are multiplexed, read out and processed by one MDC. The data of several MDCs are collected and processed by the off-detector readout card MMB (MVD Multiplexer Board), also under development at KIT. The processed data is then transferred via 100 GbE optical links to the computing nodes. The ToASt chips have been integrated with the FPGA implementation of the MDC to form the first fully functional detector module. Beam tests have been performed at the COSY facility in Jülich. This paper focuses on the design of MDC ASIC and MMB board, the integration with the ToASt and presents preliminary beam test results.