A floating-point processor for fast and accurate sine/cosine evaluation

Paliouras, V.; Karagianni, K.; Stouraitis, T.

doi:10.1109/82.842112

Cited by 23 publications

(13 citation statements)

References 9 publications

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“…Cao et al state that degree-2 interpolations use 33 percent less memory than approximations, a result that is consistent with the range provided in [11]. Paliouras et al [23] explored degree-2 interpolation hardware for evaluating sine and cosine functions. The interval was partitioned nonuniformly to minimize the number of function values required.…”

Section: Related Workmentioning

confidence: 58%

“…Use fðx iÀ1 Þ, fðx i Þ, and fðx iþ1 Þ for the interpolation over x ¼ ½x iÀ1 ; x i Þ or x ¼ ½x i ; x iþ1 Þ only. Method 1 is employed by Paliouras et al [23] and Cao et al [12], whereas method 2 is employed by Lewis [11]. Although method 1 is simpler to implement from the hardware perspective (Section 5), method 2 can result in lower interpolation errors and allows the function values to be adjusted as discussed in Section 3.2.1 to reduce the maximum absolute error.…”

Section: Degree-2 Interpolationmentioning

confidence: 99%

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Hardware Implementation Trade-Offs of Polynomial Approximations and Interpolations

Lee¹,

Cheung

Luk

et al. 2008

IEEE Trans. Comput.

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Abstract-This paper examines the hardware implementation trade-offs when evaluating functions via piecewise polynomial approximations and interpolations for precisions of up to 24 bits. In polynomial approximations, polynomials are evaluated using stored coefficients. Polynomial interpolations, however, require the coefficients to be computed on-the-fly by using stored function values. Although it is known that interpolations require less memory than approximations, but at the expense of additional computations, the trade-offs in memory, area, delay, and power consumption between the two approaches have not been examined in detail. This work quantitatively analyzes these trade-offs for optimized approximations and interpolations across different functions and target precisions. Hardware architectures for degree-1 and degree-2 approximations and interpolations are described. The results show that the extent of memory savings realized by using interpolation is significantly lower than what is commonly believed. Furthermore, experimental results on a field-programmable gate array (FPGA) show that, for high output precision, degree-1 interpolations offer considerable area and power savings over degree-1 approximations, but similar savings are not realized when degree-2 interpolations and approximations are compared. The availability of both interpolation-based and approximation-based designs offers a richer set of design trade-offs than what is available using either interpolation or approximation alone.

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Section: Related Workmentioning

confidence: 58%

Section: Degree-2 Interpolationmentioning

confidence: 99%

Hardware Implementation Trade-Offs of Polynomial Approximations and Interpolations

Lee¹,

Cheung

Luk

et al. 2008

IEEE Trans. Comput.

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“…The above mentioned techniques also require evaluation of the trigonometric (sin and cos) and/or inverse trigonometric (arctangent) functions which may increase the computational effort for implementing on a real-time low cost digital signal processor [38,39]. A look-up table can be used for sin and cos functions [38].…”

Section: Introductionmentioning

confidence: 99%

A Demodulation-Based Technique for Robust Estimation of Single-Phase Grid Voltage Fundamental Parameters

Reza

Agelidis

2017

IEEE Trans. Ind. Inf.

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This paper proposes a robust technique for the single-phase grid voltage fundamental amplitude, frequency and phase angle estimation under distorted grid conditions. It is based on a demodulation method tuned at a fixed frequency. It does not have stability issue due to an open loop structure, does not require real-time evaluation of trigonometric and inverse trigonometric functions, and also avoids the use of look-up table. It can provide accurate estimation of the singlephase grid voltage fundamental parameters under DC offset and harmonics. When compared with a frequency adaptive demodulation technique, the proposed one is less affected by DC offset, can provide faster frequency estimation and also avoids interdependent loop, trigonometric and inverse trigonometric functions operation. Simulation and experimental results are presented to verify the performance of the proposed technique.

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“…When multipliers are available on the architecture, CORDIC-like shift-and-add methods need not be used and the computation of sine and/or cosine eventually often relies on the evaluation of one or several univariate polynomial approximations, be it in hardware [5], [6], [7] or in software [8], [9], [10], [11], [12], [13], [14]. In particular, fixedpoint univariate polynomials have been already employed for sine and cosine on ST231 [11, §14], yielding respective latencies of 29 and 36 cycles, without accuracy guarantee.…”

Section: Introductionmentioning

confidence: 99%

Simultaneous Floating-Point Sine and Cosine for VLIW Integer Processors

Jeannerod

Jourdan-Lu

2012

2012 IEEE 23rd International Conference on Application-Specific Systems, Architectures and Processors

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Abstract-Graphics and signal processing applications often require that sines and cosines be evaluated at a same floatingpoint argument, and in such cases a very fast computation of the pair of values is desirable. This paper studies how 32-bit VLIW integer architectures can be exploited in order to perform this task accurately for IEEE single precision. We describe software implementations for sinf, cosf, and sincosf over [−π/4, π/4] that have a proven 1-ulp accuracy and whose latency on STMicroelectronics' ST231 VLIW integer processor is 19, 18, and 19 cycles, respectively. Such performances are obtained by introducing a novel algorithm for simultaneous sine and cosine that combines univariate and bivariate polynomial evaluation schemes.

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A floating-point processor for fast and accurate sine/cosine evaluation

Cited by 23 publications

References 9 publications

Hardware Implementation Trade-Offs of Polynomial Approximations and Interpolations

Hardware Implementation Trade-Offs of Polynomial Approximations and Interpolations

A Demodulation-Based Technique for Robust Estimation of Single-Phase Grid Voltage Fundamental Parameters

Simultaneous Floating-Point Sine and Cosine for VLIW Integer Processors

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