A formalism for functionality preserving system level transformations

Abdi, S.; Gajski, D.

doi:10.1109/aspdac.2005.1466146

Cited by 6 publications

(5 citation statements)

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“…An approach similar to ours is given by [1]. This work shares goals similar to ours: functionalitypreserving system transformations/refinements so that traditional formal methods techniques are needed only at the specification level.…”

Section: Related Researchmentioning

confidence: 94%

Rule-Based Approaches for Equivalence Checking of SpecC Programs

Shankar

Fujita

2008

2008 6th ACM/IEEE International Conference on Formal Methods and Models for Co-Design

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This paper describes a rule-based approach for equivalence checking of reactive systems. The approach is based on new types of dependence and flow graphs that are more appropriate for reactive languages than traditional notions intended for transformational languages. Equivalence rules utilizing this static dependence and flow information are derived from language semantics. The rules are then applied in a bottom-up fashion, corresponding to the structures of the programs being checked, until equivalence is shown. A prototype toolset has been implemented, and results indicate speedups of several orders of magnitude over more traditional equivalence checkers. The paper describes our approach and tools, and also outlines how our methods can be used in a general equivalence checking system.

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Section: Related Researchmentioning

confidence: 94%

Rule-Based Approaches for Equivalence Checking of SpecC Programs

Shankar

Fujita

2008

2008 6th ACM/IEEE International Conference on Formal Methods and Models for Co-Design

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“…Abdi et al [13] introduced Model Algebra, a formalism for representing SoC designs at system level. The work by Kroening et al [14] formalized the semantics of SystemC by means of labeled Kripke structures.…”

Section: Specification Using Systemc Tlmsmentioning

confidence: 99%

Modeling and Specification of SoC Designs

Chen

Qin

Koo³

et al. 2012

System-Level Validation

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As a system-level specification, SystemC transaction level modeling (TLM) [1] establishes a standard to enable fast simulation and easy model interoperability for hardware/software co-design. It mainly focuses on communication between different functional components of a system and data processing in each component. Although UML is being used as a de facto software modeling tool, UML Profile for SoC [2] has been proposed as an extension of UML 2.X to enable SoC modeling. It can be used to capture the system behavior for both SoC software and hardware components [3][4][5]. However, both SystemC TLM and UML diagrams are not formal enough for automatic analysis, especially for the validation using model checking techniques [6]. The inherent ambiguity, incompleteness, and contradiction in specifications can lead to different interpretations. Therefore, it is necessary to formalize the semantics of such SoC specifications.This chapter focuses on the formal modeling of the two widely used SoC specifications. It describes how to automatically extract the formal models from specifications. Such formal models can be used for automated generation of directed tests (see the details in Chap. 3). This chapter is organized as follows. Section 2.2 presents both graph and finite state machine (FSM)-based modeling of systems. Section 2.3 describes the formal modeling of SystemC TLM designs. Section 2.4 describes formal modeling techniques of UML activity diagrams. Finally, Sect. 2.5 summarizes the chapter. Modeling of Complex SystemsModeling plays a central role in design automation of SoC architectures. The formal modeling can not only help designers accurately describe the syntax and semantics of a design, but can also enable the automatic analysis using corresponding tools.M. Chen et al., System-Level Validation,

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“…Although simulation using directed tests is fast, it is difficult to automate the directed test generation process. To enable automated analysis, various researchers have tried to extract formal representations [10][11][12][13] from SystemC TLM specifications. However, all these modeling techniques focus on the formal modeling and translation of SystemC specifications rather than directed test generation.…”

Section: Related Workmentioning

confidence: 99%