A fourth‐order bidirectional DC–DC converter for interfacing battery in a solar ‐photovoltaic‐fed low‐voltage residential DC nano‐grid: Design and analysis

Abstract

SummaryIn this paper, a non‐isolated fourth‐order bidirectional DC–DC converter (FoBiDC) which exhibits continuous input and output current together with minimum‐phase response, both during buck and boost modes, is proposed and analyzed. It is then used to interface a battery in a solar photovoltaic (SPV) fed low‐voltage low‐power residential DC nano‐grid (LVRDNG). The design equations for the converter are derived by performing steady‐state and time‐domain analysis. The small‐signal models are developed and used for designing voltage‐mode controller to regulate the DC bus voltage of LVRDNG and perform stability analysis. The small‐signal analysis reveals the possibility of right‐half plane (RHP) zero and formation of an up–down glitch in the frequency response of converter transfer functions which results in slower dynamic response and increased sub‐system interactions. Therefore, an optimized power stage design methodology, using particle swarm optimization (PSO), is adopted for optimal parameter selection with the aim to shift RHP zero to left‐half plane (LHP) and to mitigate the effect of up–down glitch. The effect of sub‐system interactions, arising due to interfacing of FoBiDC, on other coherently operating converter in the LVRDNG is also analyzed by formulating an integrated small‐signal model of LVRDNG. The scaled down laboratory prototype of FoBiDC and LVRDNG is developed to experimentally validate the steady‐state and dynamic performance. The theoretical and experimental results are found to be in close correlation with each other.

Battery and supercapacitor assisted controller for stability enhancement of DC microgrid

“…Table 2 shows the battery and SC current to DC bus voltage T/F, where the values of G viB0 , G viS0 , ω zvB , ω zvS , ω pvB and ω pvS are 17.99, 18.667, 3702.9 rad/s, 3982.2 rad/s, 45.310 rad/s and 45.310 rad/s, respectively. The uncompensated and compensated loop gain of the DC bus voltage control loop is obtained from (17) and (18). The deviation in DC bus voltage due to oscillatory and transient power will be compensated by the SC.…”

“…In this configuration, the storage unit which is directly coupled to the load bus require higher rating and is always under utilized. The most efficient storage utilization and control is provided by the third topology known as active topology in which the battery and SC are connected to load bus via DC/DC converters 18,19 . Hence, this paper utilizes active topology so that they can be independently controlled and optimally utilized.…”