The use of embedded cores poses several new problems in testing systems built around them. An important one amongst them is the need to achieve high,fault coverage in an embedded context. Several impediments exist to obtaining a high ,fault coverage in such embedded systems. This paper presents a set of techniques,for enhancing the,fault coverage in and embedded DSP core based system. Its main contributions are: ( i ) It examines the various test constraints in such a system and the impediments to achieving a high ,fault coverage therein. (ii) It presents the development of ,fiinctional testing techniques to enhance the coverage of the individual components. (iii) It coniplements this effort by presenting fault analysis techniques, to ,further enhance this coverage. The techniques described in the paper have been used to inlprove the ,fault coverage of devices built around Texas Instruntents new DSP core, TMS32OC27xx. Results indicate the effectiveness (&functional testing and ,fault analysis techniques in raising the DSP core and memory wrapper logic coverage above 95%, over and above the best results obtained through ATPG.