A frequency adaptive single-phase phase-locked loop with harmonic rejection

Abstract

An improved Phase-Locked Loop (PLL) for extracting phase and frequency of the fundamental component of a highly distorted grid voltage is presented. The structure of the single-phase PLL is based on the Synchronous Reference Frame (SRF) PLL and uses an All Pass Filter (APF) to generate the quadrature component from the single phase input voltage. In order to filter the harmonic content, a Moving Average Filter (MAF) is used, and performance is improved by designing a lead compensator and also a feed-forward compensator. The simulation results are compared to show the improved performance with feed-forward. In addition, the frequency dependency of MAF is dealt with by a proposed method for adaption to the frequency. This method changes the window size based on the frequency on a sample-by-sample basis. By using this method, the speed of resizing can be reduced in order to decrease the output ripples caused by window size variations.

Development of Frequency-Fixed All-Pass Filter-Based Single-Phase Phase-Locked Loop

“…The operation of this mechanism, two-stage APF (TSAPF) is explained from a frequency domain point of view in [26], while here the functioning is presented from time domain perspective. Consider the input voltage signal v g (t) = V m sin(ω g t)), while its steady state v β (t) signal is given in (13). When (v g (t)) is again passed through another APF, the resultant signal is obtained as:…”

“…The APF presents a straightforward solution yielding an unity gain for all frequencies, while providing • phase shift between the input and output signals at a specific (tuned) frequency. The research on APF-PLL has focused mainly on improving its disturbance rejection capability [12]- [14], discretization approach impact [15], governing dynamic speed [16] and small-signal modeling [10], [13]. The APF is adapted to grid frequency variation via an additional frequency feedback loop.…”

PLL for Grid Synchronization of Single Phase Distributed Generation System

“…The equations (1)(2)(3)(4)(5)(6) in the time domain can be very easily translated to the complex frequency domain by using the Laplace transform. If it is considered that kpd = kvco = 1, the output of phase detector, loop filter and VCO blocks can be given by (7), (8) and (9) respectively,…”

“…The adaptive filter based phase detector is implemented using a Second order Generalized Integrator (SOGI) which has better harmonic rejection characteristics [6]. The algorithm is developed to minimize the computational load on the digital processor so that the PLL can be implemented using a low cost microcontroller as against to the use of high end costly DSP processors.…”

A novel average filter based phase-locked loop for FACTS devices

“…Especially, ANF based PLLs have a better capability to extract these variables due to having a simple and flexible algorithm, fast dynamic response, less computation-time and an easy application structure for the microcontrollers [21][22][23][24]. In this study, therefore, a new and simple PLL method (APLL) is proposed by integrating the Average Filters (AF) into the simple structure of ANF algorithm.…”