A frequency-locked loop technology of three-phase grid-connected inverter based on improved reduced order generalized integrator

Wang, A. Jie; Yundong, B.; Meng, Chang

doi:10.1109/iciea.2015.7334204

Cited by 18 publications

(15 citation statements)

References 12 publications

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“…Filter characteristics and dynamic response speed are considered, k =1.414 is selected in this paper. From (4), the quality factor Q is equal to the reciprocal of k. When k =1.414, is also consistent with the requirement of the filter quality factor [31], namely, Q=0.707.…”

Section: Parameter Design Of Esogisupporting

confidence: 70%

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A Simple Approach to Reject DC Offset for Single-Phase Synchronous Reference Frame PLL in Grid-Tied Converters

Liu

Wang

et al. 2020

IEEE Access

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Synchronous reference frame phase-locked loop (SRF-PLL) is widely used for grid voltage synchronization in single-phase grid-connected power converters. However, in the actual situation, dc offset component may be introduced in the input of the PLL, due to the transient fault of the power grid, sampling and measurement error, or A/D signal processing. A simple yet effective approach with additional all-pass filter based dc rejecter is presented for SRF-PLL, in this paper. Thereby, correct estimation and undesirable periodic ripple free can be achieved in SRF-PLL, when the input signal contains dc offset. The second order generalized integrator based PLL (SOGI-PLL) is first introduced, followed by the analysis on influence of the input dc offsets in SRF-PLL. The structure of enhanced-SOGI (ESOGI) with its analysis of dc offset rejection effects and performance have been then formulated in detail. Finally, experimental results are presented to demonstrate the effectiveness of the proposed ESOGI based PLL. INDEX TERMS DC offset, inverters, phase-locked loop (PLL), second order generalized integral.

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Section: Parameter Design Of Esogisupporting

confidence: 70%

“…where T is the sampling time, τ is the damping coefficient. According to (31), D(z) is expressed as D(n):…”

Section: B Calculation Comparison Of Esogi-pll With Popular Sogi Basmentioning

confidence: 99%

A Simple Approach to Reject DC Offset for Single-Phase Synchronous Reference Frame PLL in Grid-Tied Converters

Liu

Wang

et al. 2020

IEEE Access

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“…To enhance the FLL DC-offset rejection capability, two integrators (as highlighted in Fig. 3) may be included in the standard FLL structure [12]- [14]. These integrators provide an estimation of the grid voltage DC component and, therefore, completely reject its disturbing effect on the FLL performance.…”

Section: ) the Relation Between Flls And Plls With Inloop Filtersmentioning

confidence: 99%

A Study on Three-Phase FLLs

Golestan

Guerrero

Vasquez

et al. 2019

IEEE Trans. Power Electron.

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Contrary to the phase-locked loop (PLL), which has almost reached a mature stage of development in power and energy applications (particularly in three-phase systems), the frequency-locked loop (FLL) is not a mature technique yet. This is probably because of the implementation of FLLs in the stationary reference frame which makes their modeling, tuning, and performance enhancement more complicated than PLLs. The aim of this paper is conducting a research on three-phase FLLs. Providing a review of recent advances, introducing the concept of inloop filter for designing more advanced FLLs, demonstrating the FLL modeling and tuning in the presence of an inloop filter, analyzing the advantages and disadvantages of using an inloop filter in the FLL structure, and establishing a connection between FLLs and PLLs are the main parts of this research.

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“…This equivalence implies that FLLs have similar issues as the PLLs. Further development of the FLLs allows the designer to mitigate the issues, for example, in order to tackle the dc offset, two additional integrator can be realized [22]; to improve performance for imbalance voltage and harmonics, a parallel configuration of two or more first-order complex band-pass filter can be used [23]. More details about the recent advancement of the FLLs can be found in the following review papers [21], [24].…”

Section: Introductionmentioning

confidence: 99%

Phase-Tracking Robust-Synchronization-Loop for Grid-Connected Converters

Ամին

2022

IEEE Trans. Power Delivery

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This paper presents a novel phase-tracking robustsynchronization-loop (RSL) to track the phase and frequency of the grid voltage. A detailed analytical model of the proposed RSL algorithm is presented. Further, a state-space small-signal model is developed, including the dynamics of a grid-connected converter and its controller. From the small-signal analysis, it is shown that the eigenvalues associated with the states of the RSL remain in the left half-plane even for a very weak grid condition with a grid impedance of 1.0 pu, thus, it provides better stability property with the grid-connected converters. In order to show the effectiveness of the proposed RSL, simulation results are provided for different scenarios of the grid conditions such as voltage and frequency disturbance, unbalance grid condition and grid faults. Further, the performance of the RSL algorithm is tested by experiment in lab. The results show that the proposed method effectively tracks the phase and frequency of the grid voltage and maintains the good synchronism of the converters during different disturbances.

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A frequency-locked loop technology of three-phase grid-connected inverter based on improved reduced order generalized integrator

Cited by 18 publications

References 12 publications

A Simple Approach to Reject DC Offset for Single-Phase Synchronous Reference Frame PLL in Grid-Tied Converters

A Simple Approach to Reject DC Offset for Single-Phase Synchronous Reference Frame PLL in Grid-Tied Converters

A Study on Three-Phase FLLs

Phase-Tracking Robust-Synchronization-Loop for Grid-Connected Converters

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