A fully integrated analog front-end macro for cable modem applications in 0.18-μm CMOS

Wiesbauer, A.; Clara, Martin; Harteneck, M.; Potscher, T.; Seger, B.; Sandner, C.; Fleischhacker, C.

doi:10.1109/jssc.2002.1015684

Cited by 9 publications

(1 citation statement)

References 4 publications

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“…Final channel selection is done with the second IFfilter. After further amplification with a variable-gain IF-amplifier, the signal is fed to an A/D-converter and digital demodulator [2,3]. Double-conversion receiver architecture, depicted in Fig.…”

Section: Introductionmentioning

confidence: 99%

A Broadband Double-Conversion RF Tuner

Stadius¹,

Malinen²,

Jarvio³

et al. 2005

Analog Integr Circ Sig Process

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A prototype design of upconverter and downconverter units for a double-conversion cable-modem RF tuner are presented. The upconverter upconverts a channel from 47-862 MHz input band to around 1575 MHz intermediate frequency. The image-reject downconverter shifts the channel to 36.125 MHz (EU) or to 43.75 MHz (US). The upconverter includes a variable-gain low-noise amplifier, a double-balanced mixer, a three-stage VCO bank for LO generation and a divide-by-two circuit for driving an external PLL. The downconverter includes a LNA, image-reject mixers in Hartley configuration, a 3-stage polyphase filter, an IF-amplifier and a SAW driver. For the second LO generation the circuit includes a 6-GHz on-chip VCO, a divide-by-four circuit for quadrature LO and a divide-by-16 for feeding an external PLL. Signal reversal switching in the LO buffer can be used for the selection of LSB/USB injection. All building blocks are presented in this paper and experimental results are given from the upconverter, downconverter, and RF tuner demonstrator including SAW filters with center frequencies at 1575 and 44 MHz. The circuits are fabricated in a 0.9-µm SiGe bipolar process.

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Section: Introductionmentioning

confidence: 99%