A Fully Integrated Ferroelectric Thin‐Film‐Transistor – Influence of Device Scaling on Threshold Voltage Compensation in Displays

Abstract

Thin‐film transistors (TFTs) based on amorphous indium‐gallium‐zinc‐oxide (a‐IGZO) have attracted vast attention for use in organic light‐emitting diode (AMOLED) displays due to their high electron mobility and large current on–off ratio. Although amorphous oxide semiconductors show considerably less threshold voltage (Vth) variation than poly‐silicon, large‐area processing and degradation effects can impede the characteristic parameters of a‐IGZO TFTs, which manifests in an uneven brightness distribution across the display panel. Such Vth variations are usually reduced by additional compensation circuits consisting of TFTs and capacitors. Herein, a new approach to compensate such variabilities is demonstrated: the integration of a programmable ferroelectric (FE) film in the gate stack of the TFT. This simplifies the complexity of the pixel cell and potentially minimizes the need for compensation circuits, which is crucial for transparent displays. To test this new approach, fully integrated FE‐TFTs (i.e., with vias contacting a structured bottom gate electrode from the top) based on a‐IGZO and FE hafnium‐zirconium oxide (HZO) are developed. A single low‐temperature post‐fabrication treatment at 350 °C for 1 h in air is used to simultaneously crystallize the HZO film in the FE phase and to reduce the number of defects in the a‐IGZO channel. The structural and electrical characterizations provide comprehensive guidance for the design of effective FE‐TFT gate stacks and device geometries. An accurate control of the polarization state and linear switching between multiple intermediate states is shown by using programming pulses of various amplitudes and widths. Furthermore, a direct correlation between the channel length and the applied pulse width for programming is observed.

Fluorite‐Structured Ferroelectric and Antiferroelectric Materials: A Gateway of Miniaturized Electronic Devices

“…Consequently, for mass production, this material system can easier be deposited via atomic layer deposition (by using a precursor ratio of 1:1) [6] or sputtering techniques. [47] ii) The crystallization in the FE phase can be achieved at low process temperatures of 300-400 °C, [13,[48][49][50] which is the lowest among all so far investigated dopants. [51] This is most likely due to the comparatively low crystallization temperature of ZrO 2 compared to other potential metal oxide dopants.…”

“…In the literature, many studies can be found that optimize the HZO films with regard to the requirements mentioned above, for example, by using various film thicknesses and dopant concentrations. [13,[49][50][51][96][97][98] The first important parameter that can be tailored to optimize the crystallization temperature and the FE properties are thus the thickness of the HZO films. It is known from the literature that the crystallization temperature increase for ultrathin films (in the range of 5 nm and below) due to the surface energy effect.…”

“…The electric and stress-coupled effects between the two layers produce FE hysteresis with modulated effect on the coercive Reproduced with permission. [50] Copyright 2021, Wiley. and c) pinched hysteresis loop with finite but small remnant polarization.…”

“…In the literature, many studies can be found that optimize the HZO films with regard to the requirements mentioned above, for example, by using various film thicknesses and dopant concentrations. [ 13,49–51,96–98 ]…”

Room temperature PVD TiN to improve the ferroelectric properties of HZO films in the BEoL

“…The most promising FE material to meet these requirements is zirconium-doped hafnium oxide (HZO) [4][5][6]. It crystallizes in the FE phase at about 350 °C and over a wide range of doping concentrations [7][8][9][10].…”