A Fully Integrated Quad-Band GPRS/EDGE Radio in 0.13¿m CMOS

Darabi, Hooman; Zolfaghari, A.; Jensen, Henrik Toft; Leete, J.; Mohammadi, Behnam; Chiu, J.; Li, T.; Zhou, Z.; Lettieri, P.; Chang, Yuyu; Hadji, Ahmed; Chang, P.J.; Nariman, Med; Bhatti, I.; Medi, Ali; Serrano, L.; Welz, J.; Shoarinejad, K.; Hasan, S. M. Rezaul; Castaneda, J.A.; Kim, J.; Tran, H.; Kilcoyne, P.; Chen, R.; Lee, B.; Zhao, Bin; Ibrahim, B.; Rofougaran, M.; Rofougaran, A.

doi:10.1109/isscc.2008.4523129

Cited by 19 publications

(7 citation statements)

References 7 publications

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“…To avoid known issues with DC and low frequency noise and distortion, low-IF [14] is adopted mostly in the cases when system specifications or practical signal conditions have allowed relaxed image rejection requirements like in GSM/EDGE [15], Bluetooth [16] or GPS [17]. It is also straightforward to adopt both architectures using the same configurable circuitry and adopt the optimum for each protocol as in some cellular multimode ASICs [9], [18].…”

Section: A Receiver Architectures For Portable Devicesmentioning

confidence: 99%

A 900-MHz Direct Delta-Sigma Receiver in 65-nm CMOS

Koli

Kallioinen

Jussila

et al. 2010

IEEE J. Solid-State Circuits

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Direct delta-sigma receiver architecture is introduced for wireless communication systems, such as LTE or WiMax. Architecture is based on direct downconversion, delta-sigma feedback that is up-converted to RF, and N-path filtering technique. Hence, the core receiver functions including channel selection filtering are embedded to a RF ADC with excellent linearity performance. This is achieved by transforming narrow-band filtering partially to RF injecting feedback into the input of the second amplifier stage, hence relieving requirements of the most critical subsequent stages. A 900-MHz direct delta-sigma receiver prototype occupies an active area of 1 2 mm 2 in 65-nm CMOS. The receiver for low-band cellular operations achieves NF of 2.3 and 6.2 dB in conventional and delta-sigma modes, respectively, and out-of-band IIP3 up to +4 dBm when the delta-sigma loop is active. The chip consumes 80 mW from a 1.2-V supply.

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Section: A Receiver Architectures For Portable Devicesmentioning

confidence: 99%

A 900-MHz Direct Delta-Sigma Receiver in 65-nm CMOS

Koli

Kallioinen

Jussila

et al. 2010

IEEE J. Solid-State Circuits

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“…The transmit signal phase is represented by . When it is assumed that the reference signal phase is zero, the relation between output signal phase and is formulated as where (2) (3)…”

Section: System Architecture Descriptionmentioning

confidence: 99%

Self-Calibrated Two-Point Delta–Sigma Modulation Technique for RF Transmitters

Lee

Park

et al. 2010

IEEE Trans. Microwave Theory Techn.

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A self-calibrated two-point delta-sigma modulation technique for CMOS RF transmitter is proposed. This calibration technique employs voltage-controlled oscillator (VCO) and delta-sigma modulator input ports in a frequency synthesizer. By monitoring the control voltage of a loop filter, the gain mismatch between two paths can be detected and completely calibrated by modifying the gain of the VCO path. The acceptable timing mismatch between the two paths is also investigated so that the timing can be controlled to ensure stable output performance. As a result, the phase modulation guarantees a robust performance against PVT variations without using any predistortion techniques. This technique is applied to a quad-band (850/900/1800/1900) GSM/EDGE transmitter for verification. For the amplitude modulation of the EDGE mode, a dc calibration is adopted to suppress unwanted carrier leakage tones. The measurement results show satisfactory GSM/EDGE spectrums and error vector magnitude performance at both low-and high-frequency bands.

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“…However, cost and size constraints play the major role, especially in multi-band applications, and limit the duplexer performance [10]. As a result, the duplexer isolation is finite, on the order of 45 to 50 dB, and the receiver is plagued by the transmitter signal and its noise [3,12], as shown in As shown in Fig. 5.5, if both the receiver and transmitter SAW filters could be integrated, the number of the external components would be reduced by a factor of 2, to 10.…”

Section: Introductionmentioning

confidence: 99%

“…These two effects are typically relaxed by placing an external SAW filter at the receiver to further attenuate the transmitter leakage and out-of-band blockers. Otherwise, the second-and third-order nonlinearity requirements would be very stringent [3,12]. Depending on the duplexer FIGURE 5.…”

Section: Introductionmentioning

confidence: 99%

“…Third, the presence of these filters removes the flexibility of sharing the LNAs in multi-mode or multi-band applications, particularly in software-defined radios. Therefore, it is highly desirable to eliminate these external filters.Unlike the receiver, the GSM transmitter does not suffer from similar issues, thanks primarily to the translational loop, or PLL-based architecture [3][4][5][6][7][8]. The narrow PLL bandwidth typically makes the VCO the only contributor at far-out offset frequencies, and typically, by proper design, the noise and spur requirements are met.…”

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confidence: 99%

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