A general cost-effective design structure for probabilistic-based noise-tolerant logic functions in nanometer CMOS technology

A general scheme for noise-tolerant logic design based on probabilistic and DCVS approaches

“…In this section, some related work in [1]- [4] will be described. The original MRF theory will be illustrated first and then the process of mapping this theory into logic circuits [1] will be explained, along with the method to design costeffective MRF circuit structure in [2], [3]. At last, the work in [4] will be introduced.…”

“…As pointed out in [1], the energy of noise signal could be reduced by maximizing the joint probability of the inputoutput pairs, which comes at a cost of redundant hardware. This work is further optimized in [2], [3] where parts of the gates in the original circuit scheme [1] are removed. In [4], the MRF approach is combined with the technique of Differential Cascode Voltage Switch (DCVS), however, this method only proposed an improved inverter to design xor-nxor gate.…”

“…In this paper, a general circuit scheme for noise-tolerant logic design based on MRF theory and DCVS technique has been proposed. A simple DCVS block with only four transistors has been successfully inserted to the Cost-Effective Noise-Tolerant Circuit based on Markov Random Field (CENT MRF) in [3]. Extensive simulations have been implemented on HSPICE and the results show that our proposed design could operate correctly with the input signal of 1dB SNR.…”

“…A DCVS block with only four transistors has been successfully inserted to the original circuit scheme from [3] and extensive simulation results based on HSPICE show that our proposed design can operate correctly with the input signal of 1dB SNR. When using the Kullback-Leibler Distance (KLD) [5] as the evaluation parameter, the KLD value of our design decreases by 76.5% on average than [3] which means that superior noiseimmunity could be obtained through our work.…”

“…Thus, many pertinent researches about noise-tolerant logic gate have received growing attention. Considering the randomness as the noise's nature, probabilisticbased approach proves better noise-immunity and three design schemes with the technique of Markov Random Field (MRF) have been proposed in [1]- [3]. In this paper, a general circuit scheme for noise-tolerant logic design based on MRF theory and Differential Cascode Voltage Switch (DCVS) technique has been proposed, which is an extension of the work in [3], [4].…”