A GPS LNA RFIC with voltage‐controlled noise and input matching

Abstract

A low‐noise amplifier (LNA) design with a voltage‐controlled matching section using a transistor for optimal matching between noise figure (NF) and input impedance is proposed in this letter. A crucial goal for the design is to achieve low NF required in the global positioning systems with a good input matching. The proposed design is based on the cascade of a common‐gate and common‐source transistor. The gate voltage of a common‐gate transistor is used to control the real part of optimum source impedance (Zopt) approximates to 50 Ω for NF and input impedance matching. Because the design does not require inductors or capacitors for noise matching, it reduces NF and chip area substantially. The LNA is designed and implemented using WIN 0.15 μm PHEMT foundry process and has an area of 0.84 mm × 0.84 mm. The power consumption is 18 mW from a 2.5 V supply voltage. The measurement results of the proposed LNA RFIC are 2.4 dB NF, 12.6 dB gain; input‐referred 1 dB compression point (IP1dB) is −6 dBm, and input‐referred third‐order intercept point is 6.3 dBm. © 2011 Wiley Periodicals, Inc. Microwave Opt Technol Lett, 54:332–335, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.26524

A miniaturized 2.4-GHz CMOS low-noise amplifier using a gate-source coupling technique

“…Figure 1 shows a simplified schematic of a typical LNA. Generally, the source degeneration technique using an inductor, L SD , is popular to improve the NF [3][4][5][6][7]. Additionally, a shunt inductor, L IN , is used to cancel out the parasitic capacitance induced by the gate of the MN, as shown in Figure 1.…”