A GPU-Accelerated Web-Based Synthesis Tool for CT Sigma-Delta Modulators

Brückner, Timon; Zorn, Christoph; Anders, Jens; Becker, Joachim; Mathis, Wolfgang; Ortmanns, Maurits

doi:10.1109/tcsi.2013.2289408

Cited by 53 publications

(18 citation statements)

References 20 publications

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“…If further speed-up is desired, the code could be outsourced to a Matlab MEX-file or adapted to being used on the PC's GPU instead of its CPU. These methods already showed remarkable improvements when applied to similar applications [8], [39]. …”

Section: A Software Based (Matlab)mentioning

confidence: 99%

“…This 2-pole model is mapped onto an appropriate block level integrator structure [8] from which an extended state space representation, accounting for the second pole, can be built.…”

Section: A the Integrator Transfer Functionmentioning

confidence: 99%

“…Thereby, the error of the ZOH approach is calculated and can exactly and readily be compensated by a correction term, . Lastly, the DT update equations become: (4) With this technique, also different paths and arbitrary waveforms can be accounted for [8]. In the presented work, a nonreturn-to-zero DAC waveform is used and the same delay is present in both feedback paths (although the UKF showed in simulations that a separate estimation is also possible).…”

Section: B Ct-to-dt Mapping and Excess Loop Delay Modelingmentioning

confidence: 99%

See 2 more Smart Citations

Estimation of Non-Idealities in Sigma-Delta Modulators for Test and Correction Using Unscented Kalman Filters

Lorenz

Ritter

Anders

et al. 2015

IEEE Trans. Circuits Syst. I

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In this paper, an enhanced unscented Kalman filter is used for the estimation of non-idealities in sigma-delta modulators. As sigma-delta modulator based analog-to-digital converters are known to be prone to performance degradation from many circuit non-idealities, testing and selection of the manufactured chips as well as post-correction procedures are required to ensure a reliable performance. In contrast to most state-of-the art techniques, the proposed estimator is capable of simultaneously tracking a large set of non-ideal parameters with high accuracy and in a very short offline time within the range of microseconds. Three possible implementations are proposed and it is shown how the technique is used to perform an in situ non-ideality estimation and subsequent calibration of a manufactured chip, bringing the modulator back into its designed performance range. It is further demonstrated that the estimator can reliably detect the non-idealities over a wide range when intentionally degrading the performance of the chip by manually sweeping its trimming parameters. The presented hardware measurement results prove that the proposed technique is practically applicable to the test and/or calibration of sigma-delta data converters.

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Section: A Software Based (Matlab)mentioning

confidence: 99%

“…This 2-pole model is mapped onto an appropriate block level integrator structure [8] from which an extended state space representation, accounting for the second pole, can be built.…”

Section: A the Integrator Transfer Functionmentioning

confidence: 99%

Section: B Ct-to-dt Mapping and Excess Loop Delay Modelingmentioning

confidence: 99%

See 1 more Smart Citation

Estimation of Non-Idealities in Sigma-Delta Modulators for Test and Correction Using Unscented Kalman Filters

Lorenz

Ritter

Anders

et al. 2015

IEEE Trans. Circuits Syst. I

Self Cite

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“…The other modulator adopts coefficient optimization in sdomain by artificial intelligence algorithm, like a genetic algorithm in [17], whose result is illustrated in Fig.7(b). The estimated NTF fits the shape of the noise spectrum.…”

Section: Ntf Estimation With Finite Gain Andmentioning

confidence: 99%

An ARMA-Model-Based NTF Estimation on Continuous-Time <inline-formula> <tex-math notation="LaTeX">$\Delta\Sigma$</tex-math></inline-formula> Modulators

Chen

Feng

et al. 2015

IEEE Trans. Circuits Syst. II

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In this brief, a noise transfer function (NTF) estimation algorithm is developed for continuous time ∆Σ modulators. Different from previous methods, the proposed estimation method features an ARMA model based NTF approximation and lowcost computational resource. The NTF's zeros are derived by a spectral estimation on the quantization noise under the special situation, while the poles are obtained by a Feintuch-LMS adaptive filter with out-of-band tone injection. The proposed method also could track imprecise compensation effects on excess loop delay and finite gain and bandwidth. The parameter number of the method is only 2N + 1 for an N -th order modulator. Simulation result shows the proposed estimation method fits modulator after compensation with less than 1.7 × 10 −6 V 2 mean square error with ±0.6Vpp swing in a third-order modulator.

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“…In the study of Brückner et al . , a web‐based tool for direct design of CT ΔΣMs has been proposed based on genetic algorithm. In spite of accurate and very fast calculations of coefficients in presence of finite GBW amplifiers, it has some limitations.…”

Section: Introductionmentioning

confidence: 99%

System level design and analysis of a fourth‐order continuous‐time delta‐sigma modulator using relaxed gain‐band‐width amplifiers

Hasanzadeh

Abrishamifar

2017

Circuit Theory & Apps

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Summary In this paper, based on mathematical approaches and behavioral modeling of internal blocks, an algorithm of designing a continuous‐time delta‐sigma modulator (CT ΔΣM) with aggressive noise shaping is discussed. Using proposed methods, the coefficients of modulator can be calculated directly while the finite gain‐band‐width of amplifiers and rise/fall time of digital‐to‐analog convertors (DACs) in feedback path are included in the transfer function of CT loop filter. To decrease the number of amplifiers, a unique resonator is proposed. Also, an extra feedback DAC is introduced to further reduction of gain‐band‐width requirement of last amplifier. To verify the effectiveness of proposed methods, a fourth‐order, single loop, CT ΔΣM that benefits proportional‐integrator element for compensation of excess‐loop‐delay is realized in system and behavioral circuit levels. It has a 4‐bit quantizer, over‐sampling‐ratio of 10, and out‐of‐band‐gain of 12 dB. The peaking in signal‐transfer‐function is alleviated using a feed‐forward capacitor along with proper choosing of rest coefficients. The designed modulator has 78‐dB signal‐to‐noise‐ratio; even the non‐ideal behaviors of amplifiers and DACs are involved in simulations. Independent to sampling frequency, the proposed methods can be applied to other topologies of CT ΔΣMs. Copyright © 2017 John Wiley & Sons, Ltd.

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A GPU-Accelerated Web-Based Synthesis Tool for CT Sigma-Delta Modulators

Cited by 53 publications

References 20 publications

Estimation of Non-Idealities in Sigma-Delta Modulators for Test and Correction Using Unscented Kalman Filters

Estimation of Non-Idealities in Sigma-Delta Modulators for Test and Correction Using Unscented Kalman Filters

An ARMA-Model-Based NTF Estimation on Continuous-Time <inline-formula> <tex-math notation="LaTeX">$\Delta\Sigma$</tex-math></inline-formula> Modulators

System level design and analysis of a fourth‐order continuous‐time delta‐sigma modulator using relaxed gain‐band‐width amplifiers

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