A hardware implementation of the Compact Genetic Algorithm

Aporntewan, Chatchawit; Chongstitvatana, Prabhas

doi:10.1109/cec.2001.934449

Cited by 86 publications

(51 citation statements)

References 10 publications

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“…To evaluate the efficiency of a number of hardware implementations of GAs with OIMGA, namely half-siblingsand-a-clone [1], roulette [6] and compact GA [3], the two benchmark functions defined by Zhang and Zhang [9] shown in the following equations were used. (Fig.…”

Section: Resultsmentioning

confidence: 99%

“…INTRODUCTION number of authors have described GA hardware solutions and applied these to embedded applications, such as sensor data processing [1][2] and algorithm acceleration [3][4] [5]. In such implementations, the need to incorporate significant numbers of memory units is recognized as adversely affecting both execution speed and the physical silicon area required.…”

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confidence: 99%

“…The alternative is to provide off-chip memory, in which case not only may cost considerations dictate the use of slower memory requiring a number of clock cycles to access, but also, if a number of GAs are combined in a single device, it is unlikely that the data bandwidth will be sufficient to allow all GAs simultaneous access to their respective populations. The compact GA [3] is one approach specifically designed to address this memory bottleneck issue. To permit their use in a wide range of applications, implementations of GAs need to be flexible in their structure to allow variations in the population size and the lengths of individuals [3] [4].…”

mentioning

confidence: 99%

“…The compact GA [3] is one approach specifically designed to address this memory bottleneck issue. To permit their use in a wide range of applications, implementations of GAs need to be flexible in their structure to allow variations in the population size and the lengths of individuals [3] [4]. For example, a suitable length for the individuals is typically influenced by the size of the solution space and the diversity of the population is often related to the number of individuals in that population.…”

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confidence: 99%

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Hardware implementation of a novel genetic algorithm

2007

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Abstract-This paper presents a novel genetic algorithm, termed the Optimum Individual Monogenetic Algorithm (OIMGA) and describes its hardware implementation. As the monogenetic strategy retains only the optimum individual, the memory requirement is dramatically reduced and no crossover circuitry is needed, thereby ensuring the requisite silicon area is kept to a minimum. Consequently, depending on application requirements, OIMGA allows the investigation of solutions that warrant either larger GA populations or individuals of greater length. The results given in this paper demonstrate that both the performance of OIMGA and its convergence time are superior to those of existing hardware GA implementations. Local convergence is achieved in OIMGA by retaining elite individuals, while population diversity is ensured by continually searching for the best individuals in fresh regions of the search space.

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Section: Resultsmentioning

confidence: 99%

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Hardware implementation of a novel genetic algorithm

2007

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“…*CGAs are any of a family of tournament-based modified Compact Genetic Algorithms [9] [7] selected for this application because of the ease in which they may be implemented using common VLSI techniques [1] [8]. The *CGAs require far less memory than other EAs because they represent populations as compact probability vectors rather than as sets of actual bit strings.…”

Section: Ctrnn-ehmentioning

confidence: 99%

Active Control of Thermoacoustic Instability in a Model Combustor with Neuromorphic Evolvable Hardware

Gallagher

Vigraham

2003

Genetic and Evolutionary Computation — GECCO 2003

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Abstract. Continuous Time Recurrent Neural Networks (CTRNNs) have previously been proposed as an enabling paradigm for evolving analog electrical circuits to serve as controllers for physical devices [6]. Currently underway is the design of a CTRNN-EH VLSI chips that combines an evolutionary algorithm and a reconfigurable analog CTRNN into a single hardware device capable of learning control laws of physical devices. One potential application of this proposed device is the control and suppression of potentially damaging thermoacoustic instability in gas turbine engines. In this paper, we will present experimental evidence demonstrating the feasibility of CTRNN-EH chips for this application. We will compare our controller efficacy with that of a more traditional Linear Quadratic Regulator (LQR), showing that our evolved controllers consistently perform better and possess better generalization abilities. We will conclude with a discussion of the implications of our findings and plans for future work.

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A high‐speed unsupervised hardware architecture for rapid diagnosis of COVID‐19

Ratnakumar

Nanda

2022

Circuit Theory & Apps

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Summary In the diagnosis of COVID‐19, investigation, analysis, and automatic counting of blood cell clusters are the most essential steps. Currently employed methods for cell segmentation, identification, and counting are time‐consuming and sometimes performed manually from sampled blood smears, which is hard and needs the support of an expert laboratory technician. The conventional method for the blood‐count‐test is by automatic hematology analyzer which is quite expensive and slow. Moreover, most of the unsupervised learning techniques currently available presume the medical practitioner to have a prior knowledge regarding the number and action of possible segments within the image before applying recognition. This assumption fails most often as the severity of the disease gets increased like the advanced stages of COVID‐19, lung cancer etc. In this manuscript, a simplified automatic histopathological image analysis technique and its hardware architecture suited for blind segmentation, cell counting, and retrieving the cell parameters like radii, area, and perimeter has been identified not only to speed up but also to ease the process of diagnosis as well as prognosis of COVID‐19. This is achieved by combining three algorithms: the K‐means algorithm, a novel statistical analysis technique‐HIST (histogram separation technique), and an islanding method an improved version of CCA algorithm/blob detection technique. The proposed method is applied to 15 chronic respiratory disease cases of COVID‐19 taken from high profile hospital databases. The output in terms of quantitative parameters like PSNR, SSIM, and qualitative analysis clearly reveals the usefulness of this technique in quick cytological evaluation. The proposed high‐speed and low‐cost architecture gives promising results in terms of performance of 190 MHz clock frequency, which is two times faster than its software implementation.

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A hardware implementation of the Compact Genetic Algorithm

Cited by 86 publications

References 10 publications

Hardware implementation of a novel genetic algorithm

Hardware implementation of a novel genetic algorithm

Active Control of Thermoacoustic Instability in a Model Combustor with Neuromorphic Evolvable Hardware

A high‐speed unsupervised hardware architecture for rapid diagnosis of COVID‐19

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