Abstract:Computing workflows in heterogeneous multiprocessor systems are frequently modeled as directed acyclic graphs of tasks and data blocks, which represent computational modules and their dependencies in the form of data produced by a task and used by others. However, for some workflows, such as the task schedule in a digital signal processor may run out of memory by exposing too much parallelism. This paper focuses on the data allocation and task scheduling problem under memory constraints, and concentrates on sh… Show more
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