A hierarchical cluster-based model with run-time reconfigurable resource allocation on FPGAs

Allocating resources based on a model of coarse‐grained reconfigurable architecture

“…[15] propose a novel high level architecture support for automatic out‐of‐order (OoO) task execution on FPGA‐based heterogeneous MPSoCs, which is composed of a hierarchical middleware with an automatic task level OoO parallel execution engine. Yoosefi and Naji [16] extend the FPGA infrastructure by providing it with a hierarchical cluster‐based model similar to multi‐core systems, and propose a runtime reconfigurable resource allocation approach that reconfigurable resources can join and leave clusters at runtime dynamically based on runtime conditions. Song and Gao [17] design a hardware resource management method based on virtualised modelling for heterogeneous signal processing platform.…”