2012
DOI: 10.1109/tcsi.2011.2167259
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A High-Efficiency CMOS DC-DC Converter With 9-$\ \mu$s Transient Recovery Time

Abstract: This paper presents an efficient CMOS dc-dc converter with fast transient recovery. A fast-transient control operating in conjunction with a linearly scaled gate-driving technique is used to concurrently improve the transient response and light-load efficiency of a dc-dc converter. The controller operates under a pulse-width modulation mode during steady state and enables a saturation mode during transient to attain fast transient response. The linearly scaled gate-driving technique optimizes the gate-driving … Show more

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Cited by 36 publications
(19 citation statements)
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“…Table I shows the perform- ance comparison with prior designs. It can be seen that the proposed work achieves a higher efficiency than work proposed in [3,6,9] with 1.8 V output. Although the efficiency of this work is lower than the products proposed in [11,12], the output ripple of the proposed BUCK, which is more important in mobile phone application, is much smaller than those of products proposed in [11,12].…”
Section: Simulation and Measurement Resultsmentioning
confidence: 79%
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“…Table I shows the perform- ance comparison with prior designs. It can be seen that the proposed work achieves a higher efficiency than work proposed in [3,6,9] with 1.8 V output. Although the efficiency of this work is lower than the products proposed in [11,12], the output ripple of the proposed BUCK, which is more important in mobile phone application, is much smaller than those of products proposed in [11,12].…”
Section: Simulation and Measurement Resultsmentioning
confidence: 79%
“…However, the quiescent current in PFM mode is still relatively high because the operational amplifier loop which is used to control the system consumes considerable power. The best efficiency of reference designs [3,6,9] in PFM is lower than 80%. Thus, the demand of high efficiency could not be met if the load is extremely low (lower than 5 mA, for example).…”
Section: Introductionmentioning
confidence: 96%
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“…Regrettably, switching DC/DC converters with a pulse-width modulation (PWM), which involves a fixed switching frequency, have a low efficiency (say, lower than 60 % [1]) at light loads mainly due to switching losses. To cope with this limitation, the efficiency of PWM converters can be improved by dynamically adjusting: (i) the gate driving voltage [2,3], (ii) the size of the switching transistors [4,5], and (iii) the number of active phases (i.e. phase shedding) in multiphase DC/DC converters [6].…”
Section: Introductionmentioning
confidence: 99%
“…Design of multi-level system controller is complex and high-end hardware is required to generate multiple switching pulses [10][11]. Necessary high frequency switching signals of these systems are generated by CMOS implementation of controller [12][13]. Very Large Scale Integrated (VLSI) circuit technology provides optimum solution to the design issues of modular integrated / multi-level converters.…”
Section: Introductionmentioning
confidence: 99%