A high-output-impedance current microstimulator for anatomical rewiring of cortical circuitry

Azin, Meysam; Mohseni, Pedram

doi:10.1109/iscas.2008.4541964

Cited by 21 publications

(6 citation statements)

References 6 publications

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“…The model ensures direct control to be kept over the tissue delivered charge by means of linear relationship persistent between charge and current. Accordingly, the mode helps ensure the maintaining of a rather effective control and safer stimulation [27,28].…”

Section: Stimulus Modementioning

confidence: 99%

“…Hence, the anodic phase does not impede the action's potential propagation triggered by the cathodic phase. It is for this reason that the biphasic stimulation procedure is considered safer than the monophasic stimulation procedure, which makes it widely applied and fit for application in neural stimulators to prevent tissue damage [27][28][29].…”

Section: Stimulus Shapementioning

confidence: 99%

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Design of High Output Impedance, Large Voltage Compliance Output Stage of Implantable Hypoglossal Nerve Stimulator (HGNS) for OSA Treatment

Salah¹,

Abbes²,

Abdelmoula³

et al. 2020

Adv. sci. technol. eng. syst. j.

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Obstructive Sleep Apnea (OSA) is a potentially common sleep disorder manifested in upper airways' collapse, either partially or completely. If diagnosed late and untreated, it may result in serious complications. The standard golden method, useful for treating OSA, remains the full night Continuous Positive Airway Pressure (CPAP). Yet, due to the ensuing discomfort it incurs on patients, researchers have been motivated to investigate other efficient alternatives, whereby, OSA can be effectively treated. More recently, an increasingly popular OSA treatment solution has been developed that consists in activating the protrusion muscles of the tongue by stimulating the Hypoglossal Nerve (HGN). After discussing the classification topologies of some neural stimulator output design stages, we consider putting forward the design of output stage of Hypoglossal Nerve Stimulator (HGNS), in compliance with the HGN requirements. The proposed HGNS is simulated in cadence software using the 0.35µm CMOS technology and Matlab software. It proved to enable the delivery of a maximum stimulation current of 1mA through 1kΩ resistive load under 3.3V voltage supply. The output stage managed to achieve large voltage compliance of 94% of the voltage supply and high output impedance of 275MΩ at full scale stimulus current. The total power consumption is about 705.87µW.

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Section: Stimulus Modementioning

confidence: 99%

Section: Stimulus Shapementioning

confidence: 99%

Design of High Output Impedance, Large Voltage Compliance Output Stage of Implantable Hypoglossal Nerve Stimulator (HGNS) for OSA Treatment

Salah¹,

Abbes²,

Abdelmoula³

et al. 2020

Adv. sci. technol. eng. syst. j.

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show abstract

“…This mirror is set up with each branch having a W/L ratio 20 times that of the branch being mirrored so that up to 80 times the DAC output current can flow through the combined sink. A folded cascode opamp driving a high voltage thin-oxide transistor (V GS (max) = 1.8 V) is used to regulate the V DS of each of the mirroring transistors [30], [31]. Each op-amp can be individually deactivated, thereby turning off the respective cascode device.…”

Section: Current Sinkmentioning

confidence: 99%

An energy-efficient, dynamic voltage scaling neural stimulator for a proprioceptive prosthesis

Williams

Constandinou

2012

2012 IEEE International Symposium on Circuits and Systems

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Abstract-This paper presents an 8 channel energy-efficient neural stimulator for generating charge-balanced asymmetric pulses. Power consumption is reduced by implementing a fullyintegrated DC-DC converter that uses a reconfigurable switched capacitor topology to provide 4 output voltages for Dynamic Voltage Scaling (DVS). DC conversion efficiencies of up to 82 % are achieved using integrated capacitances of under 1 nF and the DVS approach offers power savings of up to 50 % compared to the front end of a typical current controlled neural stimulator. A novel charge balancing method is implemented which has a low level of accuracy on a single pulse and a much higher accuracy over a series of pulses. The method used is robust to process and component variation and does not require any initial or ongoing calibration. Measured results indicate that the charge imbalance is typically between 0.05 % -0.15 % of charge injected for a series of pulses. Ex-vivo experiments demonstrate the viability in using this circuit for neural activation. The circuit has been implemented in a commercially-available 0.18 μm HV CMOS technology and occupies a core die area of approximately 2.8 mm 2 for an 8 channel implementation.

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“…The DSP unit provides additional highpass filtering digitally to remove any residual dc offsets or low-frequency artifacts, and performs real-time spike discrimination based on a threshold crossing and two user-adjustable time-amplitude windows in one ADC conversion cycle. The accepted spikes trigger the stimulating back-end with a user-adjustable time delay to deliver a monophasic stimulus current pulse (0 to 94.5µA) to the neural tissue followed by passive discharge [4]. An FSK TX transmits the digitized raw or filtered neural data and discriminated spike events at 433MHz.…”

Section: Introductionmentioning

confidence: 99%

An activity-dependent brain microstimulation SoC with integrated 23nV/rtHz neural recording front-end and 750nW spike discrimination processor

Azin

Guggenmos

Barbay

et al. 2010

2010 Symposium on VLSI Circuits

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This paper describes an activity-dependent intracortical microstimulation system-on-chip (SoC) that can convert extracellular neural signals recorded from one brain region to electrical stimuli delivered to another brain region in real-time.The system integrates an analog recording front-end with input noise voltage of 2.6µV rms in 10.5kHz bandwidth, 5.5µW 10b SAR ADC, 750nW digital spike discrimination processor, and a charge-balanced constant-current stimulating back-end that can deliver up to 94.5µA with 6b resolution when triggered by neural activity. Electrical performance characterization and biological measurement results from a prototype chip fabricated in 0.35µm 2P/4M CMOS are presented.

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A high-output-impedance current microstimulator for anatomical rewiring of cortical circuitry

Cited by 21 publications

References 6 publications

Design of High Output Impedance, Large Voltage Compliance Output Stage of Implantable Hypoglossal Nerve Stimulator (HGNS) for OSA Treatment

Design of High Output Impedance, Large Voltage Compliance Output Stage of Implantable Hypoglossal Nerve Stimulator (HGNS) for OSA Treatment

An energy-efficient, dynamic voltage scaling neural stimulator for a proprioceptive prosthesis

An activity-dependent brain microstimulation SoC with integrated 23nV/rtHz neural recording front-end and 750nW spike discrimination processor

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