A High-Performance and Flexible FPGA Inference Accelerator for Decision Forests Based on Prior Feature Space Partitioning

Hardware/Software Codesign of Real-Time Intrusion Detection System for Internet of Things Devices

“…In RF, individual decision trees can be evaluated independently in their reasoning process, thereby making them wellsuited for parallelized acceleration on an FPGA [17], [20], [30], [31]. In most previous studies, the decision tree data comprising tree structures, decision nodes, and leaf nodes is stored in on-chip memory to allow multiple processing elements (PEs) perform the inference task in parallel.…”