A high performance MQ decoder architecture in JPEG2000

Abstract

For instance the JPEG 2000 is the latest international standard for still image compression supporting a rich set of features. Compared to existing JPEG image compression techniques, this standard not only has better compression ratios but also offers some exciting features. The MQ decoder of the JPEG2000 standard is an important bottleneck for real-time applications. In order to meet the real-time requirement, high speed MQ decoder architecture must be designed carefully. In this paper we propose a high speed and area efficient architecture of MQ decoder which is implemented on different FPGA platforms.

FPGA-based Auxiliary Minutest MQ-coder architecture of JPEG2000

“…But, the memory and the time consumption were more that reduced the operational speed. Horrigue et al [39] presented the area-efficient and the high-speed MQ-decoder architecture that provided the better compression ratio. The provision of significant improvement of the resource utilization in fast MQ-decoder architecture provided the maximum operating speed.…”

“…The comparative analysis between the proposed work with the Recursive BA coder [31], VLSI coder [39] and the flexible coder [40] is illustrated in Tables 12 and 13. The resizing in proposed coder reduces the number of registers, LUTs into 159 and 155, respectively. The operating frequency for the proposed work is high (214.64 MHz), which is 26.76% improvement compared to recursive BA coder.…”