This paper presents an analysis and design procedure of a three-phase three-level nine switches voltage source inverter using the space vector pulse width modulation (SVPWM) control scheme. The proposed inverter consists from a main inverter switches Q,, Q2, Q3, Q4, Q5, and Q6, an auxiliary three bidirectional switches SI, S2, and S3 and two capacitor banks C,, and C'. Where ideal switches and diodes will be assumed and the dc bus capacitor bank voltages fluctuations will be absent. The effectiveness of the SVPWM control scheme will be verified by the simulations results in the worst case where two very low switching frequencies values of 1 kHz and 5 kHz will be considered.Index Terms-three-phase three-level inverter, space vector pulse width modulation