A High-Speed Word Level Finite Field Multiplier in ${\BBF}_{2^m}$ Using Redundant Representation

Namin, Ashkan Hosseinzadeh; Wu, Huapeng; Ahmadi, M.

doi:10.1109/tvlsi.2008.2003005

Cited by 9 publications

(3 citation statements)

References 28 publications

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“…We have to complete our theoretical analysis with physical measurements and parasitic activity effects to get accurate results. We will study similar issues for very advanced GF(2 m ) multiplication algorithms such as [23,6,17,1] and for other operations (e.g. addition, subtraction, inversion, multiplication by constant and scalar multiplication) used in ECC protocols.…”

Section: Resultsmentioning

confidence: 99%

$\textrm{GF}(2^m)$ Finite-Field Multipliers with Reduced Activity Variations

Pamula¹,

Tisserand²

2012

Arithmetic of Finite Fields

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Electrical activity variations in a circuit are one of the information leakage used in side channel attacks. In this work, we present GF(2 m) multipliers with reduced activity variations for asymmetric cryptography. Useful activity of typical multiplication algorithms is evaluated. The results show strong shapes, which can be used as a small source of information leakage. We propose modified multiplication algorithms and multiplier architectures to reduce useful activity variations during an operation.

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Section: Resultsmentioning

confidence: 99%

$\textrm{GF}(2^m)$ Finite-Field Multipliers with Reduced Activity Variations

Pamula¹,

Tisserand²

2012

Arithmetic of Finite Fields

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“…In Word Level RB Multiplier [13], both the operand A and B are decomposed into number of blocks to achieve digit serial multiplication, and after that the partial products corresponding to these blocks are added together to obtain the desired product word.…”

Section: Word Level Rb Multipliermentioning

confidence: 99%

18 Years of Redundant Basis Multipliers over Galois Field

Chourasia¹,

Khare²

2016

IJCA

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Redundant basis multipliers over Galois Field have gained huge popularity in elliptic curve cryptography mainly because of their negligible hardware cost for squaring and modular reduction. Different techniques used so far for the implementation of redundant basis multipliers over Galois Field are explored here. Based on review the Word Level Redundant Basis multiplier is the most efficient among all multipliers in terms of hardware utilization. Digit serial Redundant Basis multiplication in a bit level matrix vector form is most efficient in terms of area-time complexities.

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“…The multiplication requires performing two steps: large vector multiplication a(x)b(x) and reduction of the result modulo irreducible polynomial f (x) generating the field. There exist many algorithms for performing binary field multiplication [1], [3], [6], [16], [22]. They are either dedicated for specific applications or developed in order to increase the arithmetic unit efficiency in terms of speed, area or power consumption.…”

Section: Finite Field Multiplication and Eccmentioning

confidence: 99%

Fast and Secure Finite Field Multipliers

Pamula

Tisserand

2015

2015 Euromicro Conference on Digital System Design

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International audienceThe paper presents details on fast and secure GF (2^m) multipliers dedicated to elliptic curve cryptography applications. Presented design approach aims at high efficiency and security against side channel attacks of a hardware multi-plier. The security concern in the design process of a GF (2^m) multiplier is quite a novel concept. Basing on the results obtained in course of conducted research it is argued that, as well as efficiency of the multiplier impacts the efficiency of the cryptoprocessor, the security level of the multiplier impacts the security level of the whole cryptoprocessor. Thus the goal is to find a tradeoff, to compromise efficiency, in terms of speed and area, and security of the multiplier. We intend to secure the multiplier by masking the operation, either by uniformization or by randomization of the power consumption of the device during its work. The design methodology is half automated. The analyzed field sizes are the standard ones, which ensure that a cryptographic system is mathematically safe. The described architecture is based on principles of Mastrovito multiplication method. It is very flexible and enables to improve the resistance against side channel attacks without degrading the multiplier efficiency

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A High-Speed Word Level Finite Field Multiplier in ${\BBF}_{2^m}$ Using Redundant Representation

Cited by 9 publications

References 28 publications

$\textrm{GF}(2^m)$ Finite-Field Multipliers with Reduced Activity Variations

$\textrm{GF}(2^m)$ Finite-Field Multipliers with Reduced Activity Variations

18 Years of Redundant Basis Multipliers over Galois Field

Fast and Secure Finite Field Multipliers

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