A high throughput pipelined hardware architecture for tag sorting in packet fair queuing schedulers

Van, Tu Nguyen; Thien, Vu Tang; Kim, Son Nguyen; Ngoc, Nam Pham; Thanh, Nguyen Huu

doi:10.1109/commantel.2015.7394257

Cited by 2 publications

(1 citation statement)

References 15 publications

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“…However, there exist many applications in which M largest numbers from N inputs must be selected. This is common in high-energy physics experiments and there are some dedicated solutions by using design parameterized and pipelined sorting units [29,30]. Also, when several equal maximums are present in the input dataset, current BCT design provides a maximum value and an indicator array with all maximums' positions marked with the high bit.…”

Section: Limitations Of the Studymentioning

confidence: 99%

Best-Choice Topology: An Optimized Array-based Maximum Finder

Prvan¹,

Ožegović²,

Soco³

et al. 2019

IJACSA

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Extracting maximum from an unsorted set of binary elements is important in many signal processing applications. Since quite few maximum-finder implementations are found in the recent literature, in this paper we provide an update on the current topic. Generally, maximum-finders are considered array-based, with parallel bit-by-bit comparison of the elements, or more efficient tree-based structures, with the hierarchical maximum extraction. In this paper, we concentrate on array-based topologies only, since our goal is to propose a new maximum-finder design called Best-Choice Topology (BCT), which is an optimized version of the standard Array Topology (AT). The usual bit-by-bit parallel comparison is applied for extracting the maximum and its one-of-N address. Boolean expressions are derived for BCT logical design and the minimum-finder equivalent. Functionality of the proposed architecture and the reference designs is verified with Xilinx ISE Design Suite 14.5. Synthesis is done on Application Specific Integrated Circuit (ASIC) TSMC 65nm technology. The conclusion of the paper is two-fold. First, we confirm the timing efficiency of BCT compared to AT. Next, we show that BCT is more efficient than the recent maximum-finder design called Maximum Magnitude Generator (MaxMG) and it has a great potential to be used for real-time signal processing applications.

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Section: Limitations Of the Studymentioning

confidence: 99%

Best-Choice Topology: An Optimized Array-based Maximum Finder

Prvan¹,

Ožegović²,

Soco³

et al. 2019

IJACSA

View full text Add to dashboard Cite

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HPQS: A Fast, High-Capacity, Hybrid Priority Queuing System for High-Speed Networking Devices

2019

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In this paper, we present a fast hybrid priority queue architecture intended for scheduling and prioritizing packets in a network data plane. Due to increasing traffic and tight requirements of high-speed networking devices, a high capacity priority queue, with constant latency and guaranteed performance is needed. We aim at reducing latency to best support the upcoming 5G wireless standards. The proposed hybrid priority queuing system (HPQS) enables pipelined queue operations with almost constant time complexity in practice. The proposed architecture is implemented in C++, and is synthesized with the Vivado High-Level Synthesis (HLS) tool. Two configurations are proposed. The first one is intended for scheduling with a multi-queuing system for which implementation results of 64 up to 512 independent queues are reported. The second configuration is intended for large capacity priority queues, that are placed and routed on a ZC706 board and a XCVU440-FLGB2377-3-E Xilinx FPGA supporting a total capacity of 1/2 million packet tags. The reported results are compared across a range of priority queue depths and performance metrics with existing approaches. The proposed HPQS supports links operating at 40 Gb/s. INDEX TERMS Priority queue, networking devices, high-level synthesis, field-programmable gate array (FPGA).

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A high throughput pipelined hardware architecture for tag sorting in packet fair queuing schedulers

Cited by 2 publications

References 15 publications

Best-Choice Topology: An Optimized Array-based Maximum Finder

Best-Choice Topology: An Optimized Array-based Maximum Finder

HPQS: A Fast, High-Capacity, Hybrid Priority Queuing System for High-Speed Networking Devices

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