A higher order theory of locality

Ding, Chen; Xiang, Xiaoya

doi:10.1145/2247684.2247697

Cited by 4 publications

(5 citation statements)

References 2 publications

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“…The reason is to highlight the order relationship between stack distance and miss ratio, that is, miss ratio is one order higher than stack distance. This result was proved in Ding's Higher Order Theory of Locality (HOTL) [21].…”

Section: Stack Distance Algorithmsmentioning

confidence: 78%

“…Fractals: L. He et al [24] use a fractal equation to calculate the miss ratio of a given cache size from the time between two consecutive misses. This is known as the inter-miss gap described by Denning and related to LRU miss ratio by Ding in HOTL [21]. From the distribution of the inter-miss gaps, the LRU miss ratio for a given cache size c, is derived by :…”

Section: Stack Distance Algorithmsmentioning

confidence: 99%

“…In memcached each object belongs to a class based on its size, and so MRCs can be used to maximize hit ratio over all classes for a given amount of memory. LAMA [25,26] achieves this by using the footprint metric introduced by Ding et al [21]. MIMIR [40] and Dynacache [15] also approach the problem by modeling the miss ratio for each slab class.…”

Section: Mrc Based Allocationmentioning

confidence: 99%

“…should be adaptive to the working-set size of each application. With the recent advancements in miss ratio curve estimation algorithms, we study how to use full miss ratio curves to guide our memory partitioning between applications in order to deliver near optimal allocations [21,22,27,28,42].…”

Section: Introductionmentioning

confidence: 99%

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mPart: miss-ratio curve guided partitioning in key-value stores

2018

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Web applications employ key-value stores to cache the data that is most commonly accessed. The cache improves an web application's performance by serving its requests from memory, avoiding fetching them from the backend database. Since the memory space is limited, maximizing the memory utilization is a key to delivering the best performance possible. This has lead to the use of multi-tenant systems, allowing applications to share cache space. In addition, application data access patterns change over time, so the system should be adaptive in its memory allocation. In this thesis, we address both multi-tenancy (where a single cache is used for multiple applications) and dynamic workloads (changing access patterns) using a model that relates the cache size to the application miss ratio, known as a miss ratio curve. Intuitively, the larger the cache, the less likely the system will need to fetch the data from the database. Our efficient, online construction of the miss ratio curve allows us to determine a near optimal memory allocation given the available system memory, while adapting to changing data access patterns. We show that our model outperforms an existing state-of-the-art sharing model, Memshare, in terms of cache hit ratio and does so at a lower time cost. We show that average hit ratio is consistently 1 percentage point greater and 99.9th percentile latency is reduced by as much as 2.9% under standard web application workloads containing millions of requests. xv

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Section: Stack Distance Algorithmsmentioning

confidence: 78%

Section: Stack Distance Algorithmsmentioning

confidence: 99%

Section: Mrc Based Allocationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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mPart: miss-ratio curve guided partitioning in key-value stores

2018

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“…These metrics are based on heuristics and lack formal mathematical definition. Ding et al formally established the relationship among the five locality metrics: footprint, inter-miss time, volume fill time, miss ratio, and reuse distance [20,21] . Jiang et al [22] proposed "concurrent reuse distance" for multi-threaded programs.…”

Section: Related Workmentioning

confidence: 99%

A Study on Modeling and Optimization of Memory Systems

Liu

Espina

Sun

2021

J. Comput. Sci. Technol.

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Accesses Per Cycle (APC), Concurrent Average Memory Access Time (C-AMAT), and Layered Performance Matching (LPM) are three memory performance models that consider both data locality and memory assess concurrency. The APC model measures the throughput of a memory architecture and therefore reflects the quality of service (QoS) of a memory system. The C-AMAT model provides a recursive expression for the memory access delay and therefore can be used for identifying the potential bottlenecks in a memory hierarchy. The LPM method transforms a global memory system optimization into localized optimizations at each memory layer by matching the data access demands of the applications with the underlying memory system design. These three models have been proposed separately through prior efforts. This paper reexamines the three models under one coherent mathematical framework. More specifically, we present a new memorycentric view of data accesses. We divide the memory cycles at each memory layer into four distinct categories and use them to recursively define the memory access latency and concurrency along the memory hierarchy. This new perspective offers new insights with a clear formulation of the memory performance considering both locality and concurrency. Consequently, the performance model can be easily understood and applied in engineering practices. As such, the memory-centric approach helps establish a unified mathematical foundation for model-driven performance analysis and optimization of contemporary and future memory systems.

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