A Hybrid Monitor Assisted Fault Injection Environment

Young, L. T.; Alonso, Carlos J.; Iyer, R.K.; Goswami, Kumar K.

doi:10.1007/978-3-7091-4009-3_12

Cited by 20 publications

(6 citation statements)

References 10 publications

(10 reference statements)

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“…These errors can be transient or permanent. In [39], SWIFI is augmented with a hardware monitor for higher accuracy of evaluation. As stated earlier, these models are ad-hoc, chosen mainly because of their simplicity.…”

Section: Chipmentioning

confidence: 99%

Software-Implemented Fault Injection of Transient Hardware Errors

Yount

Siewiorek

The Springer International Series in Engineering and Computer Science

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As computer applications extend to areas which require extreme dependability, their designs mai\date the ability to operate in the presence of faults. The problem of assuring that the design goals are achieved requires the observation and measurement of fault behavior parameters under various input conditions. One means to characterize systems is fault injection, but injection of internal faults is difficult due to the complexity and level of integration of contemporary VLSI implementations. This chapter explores the effects of gate-level faults on system operation as a basis for fault models at the program level.A new fault model for processors based on a register-transfer-level (RTL) description is presented. This model addresses time, cost, and accuracy limitations imposed by current fault-injection techniques. It is designed to be used with existing software-implemented fault-injection (SWIFT) tools, but the error patterns it generates are designed to be more representative of actual transient hardware faults than the ad-hoc patterns currently injected via most SWIFI experiments. INTRODUCTIONAs persons become more and more dependent on computers in everyday life, and, in many cases, for life itself, the understanding of how those computers react to faults becomes more important [13], Today's systems are much too complex to use purely formal techniques to prove their correctness, much less to prove that recovery from faults is performed correctly. Also, present technology produces parts with mean times to failure (MTTF) of several years, so designers cannot 'The research described in this chapter was funded in part by the Office of Naval Research under grant N00014-91-J-4139. ^Inter

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Section: Chipmentioning

confidence: 99%

Software-Implemented Fault Injection of Transient Hardware Errors

Yount

Siewiorek

The Springer International Series in Engineering and Computer Science

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“…Thanks to the FISB, during the fault injection experiment the target program can be run at its full speed, without any slow-down to support fault injection. The main difference between our approach and a previous hybrid Fault Injection system [5] is that in our system faults are injected via software by the means of an interrupt procedure triggered by an extra hardware board.…”

Section: Introductionmentioning

confidence: 99%

“…Several Fault Injection techniques have been proposed and practically experimented; they can basically be grouped into simulationbased techniques [1], software-implemented techniques [2] [3], hardware-based techniques [4], and hybrid techniques [5] where hardware and software approaches are applied together to optimize the performance.…”

Section: Introductionmentioning

confidence: 99%

An integrated HW and SW fault injection environment for real-time systems

Benso

Rebaudengo²,

Reorda

et al.

Proceedings 1998 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Cat. No.98EX223)

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This paper describes a system suited to support the Fault Injection process for microprocessor-based embedded systems. The system exploits a low-cost hardware board to monitor the processor status, to activate the fault injection procedure, and to gather information about the fault-free system behavior required to implement a set of fault collapsing rules. The overall environment allows at-speed fault injection experiments with negligible intrusiveness in the target system, and can therefore be used to efficiently evaluate real-time systems dependability.

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“…The FIC 3 injection environment is designed to inject faults and errors into an embedded real-time system using SWFI. Several papers on fault injection environments that use SWIFI have been published: FAUST [7], FIAT [8], FERRARI [9], HYBRID [10], FINE [6], FTAPE [11], XCEPTION [12], DOCTOR [13]. FIC 3 allows the injection of faults using modification of the source code, resembling the method used by FAUST.…”

Section: Introductionmentioning

confidence: 99%

An experimental comparison of fault and error injection

Christmansson¹,

Hiller²,

Rimen³

Proceedings Ninth International Symposium on Software Reliability Engineering (Cat. No.98TB100257)

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The complex interactions between faults, errors, failures and fault handling mechanisms can be studied via injection experiments. This paper presents an investigation of both fault and error injection techniques for emulating software faults. For evaluation, 1600 software faults and 5400 time-triggered errors were injected into an embedded real-time system. The cost-related results are: (i) the time required to create a fault set for fault injection was about 120 times longer than the time required to create an error set for time-triggered injection and (ii) the execution time for the time-triggered error injection experiments were four times shorther than for the fault injection experiments. However, the error injection would be only 1.3 times faster if another strategy for fault injection had been used. Furthermore, failure symptom related results are: (i) the test case had a greater influence than the fault type on the failure symptoms for fault injections, (ii) the error type had a greater influence on the failure symptom for timetriggered error injections than had the test case and (iii) the error type had a larger impact on the failure symptoms than the fault type.

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A Hybrid Monitor Assisted Fault Injection Environment

Cited by 20 publications

References 10 publications

Software-Implemented Fault Injection of Transient Hardware Errors

Software-Implemented Fault Injection of Transient Hardware Errors

An integrated HW and SW fault injection environment for real-time systems

An experimental comparison of fault and error injection

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