A K-Band Variable Gain Low-Noise Amplifier with Low Phase Variation in 65-nm CMOS

Cheng, Depeng; Li, Lianming; Xie, Min; Wu, Xu; He, Longzhuang; Sheng, Bin

doi:10.1109/iws52775.2021.9499661

Cited by 3 publications

(6 citation statements)

References 4 publications

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“…The gain and NF of the LNA are depicted in Figure 8c,d The performance of the proposed LNA is compared with recent publications in Table 2, Refs. [7][8][9][10]. Only differential LNAs are considered.…”

Section: Simulation Results and Comparativementioning

confidence: 99%

“…The work proposed in [7] demonstrates the design of a low-phase noise, source degenerated K-band cascode LNA with transformer-based matching networks and current steering to achieve a variable gain. The amplifier obtains a gain of 18.5 dB, with 4.1 dB NF and a 14.5 dBm OIP3.…”

Section: Simulation Results and Comparativementioning

confidence: 99%

“…As a result, it reduces the area of the integrated circuit and, therefore, its manufacturing costs. Numerous works available in the scientific literature introduce differential LNAs to facilitate system-on-chip integration since they provide high resilience to power supply and common-mode noise [7][8][9][10]. However, in differential circuits, the number of components and the power consumption are doubled.…”

Section: Introductionmentioning

confidence: 99%

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A 0.38 V Fully Differential K-Band LNA with Transformer-Based Matching Networks

et al. 2023

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The implementation of a 0.38 V K-band low-power fully differential low-noise amplifier (LNA) in a 45 nm silicon-on-insulator (SOI) process is presented. The proposed architecture employs a two-stage approach with transformer-based interstage matching networks to minimize circuit area. The proposed LNA covers the frequency range from 20.3 to 24.1 GHz, it achieves a noise figure (NF) as low as 2.2 dB, and a gain of 12.9 dB, with a power consumption of 11.7 mW from a 0.38 V DC supply in a very compact area (0.15 mm2) excluding pads. Non-linearity simulations show the proposed circuit achieves a Po1dB of −7.3 dBm, and an OIP3 (Output Third Order Intercept) of 7 dBm. The transformers allow improved area use since they are simultaneously used as matching networks, RF chokes to bias the active devices, baluns at the input and output terminals to convert the single-ended signal into differential mode, and vice versa, and facilitates the interconnection with the upcoming stages. We used a state-of-the-art tool that generates the desired inductances to perform impedance matching for a given frequency and coupling factor value. A comparison with similar works proves the proposed LNA achieves a very low NF and the lowest power consumption reported in a differential circuit.

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Section: Simulation Results and Comparativementioning

confidence: 99%

Section: Simulation Results and Comparativementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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A 0.38 V Fully Differential K-Band LNA with Transformer-Based Matching Networks

et al. 2023

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“…However, the insertion loss of the attenuation units increased the circuit area significantly and caused a notable phase variation. Greater gain control range and low noise figure (NF) can be achieved by utilizing source inductor degeneration and controlling the bias voltage of the amplifying transistors in current steering architecture, but it is difficult to reduce the phase variation in the studies by Bierbuesse and colleagues 6–9 . However, to compensate the phase shift with the gain control range, some new methods such as modified current steering and adopting a tuning capacitor at the cascode node are proposed by Park and colleagues 3,10–12 .…”

Section: Introductionmentioning

confidence: 99%

A 31–36 GHz low noise‐variable gain amplifier with less than 0.37° RMS phase error and 0.4 dB gain step in 65‐nm CMOS

Kuai,

Yan,

Liu

et al. 2024

Micro & Optical Tech Letters

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This article realizes a low noise‐variable gain amplifier (LN‐VGA) operating at the frequency range of 31–36 GHz. The LN‐VGA consists of two amplifier stages and a gain control stage. To achieve low noise and high gain, the two amplifier stages were implemented using a single‐ended inductive source‐degeneration cascaded with pseudo‐differential neutralization capacitors. Moreover, a symmetrical splitting cascode unit topology is proposed in the gain control stage to improve the precision of phase variation and gain step within the 3‐dB bandwidth. The LN‐VGA was fabricated using a 65‐nm CMOS process, demonstrating a gain control range of 15.2–21.2 dB with less than 2° phase variation and a minimum noise figure of 5.6 dB. The measured results show less than 0.37° rms phase error and a 0.4 dB gain step at 31–36 GHz. The chip occupies an area of 0.81 × 0.51 mm2 excluding pads and consumes 27 mW of power.

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“…Using these methods, a relatively large gain control range (GCR) with fine steps can be readily obtained. Alternatively, a current-steering technique has been widely applied to attain gain controllability [10]- [15]. The on-off controlled current-steering cascode devices adjust the amount of RF signal current flowing to the output load and supply.…”

Section: Introductionmentioning

confidence: 99%

CMOS Variable-Gain Low-Noise Amplifier Adopting Transformer-Based Noise Cancelling Technique for 5G NR FR2 Applications

Kim,

Kim

et al. 2023

IEEE Access

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This study presents a complementary metal-oxide-semiconductor (CMOS) variable-gain low-noise amplifier (VGLNA) employing a transformer-based noise cancelling technique, applicable for fifth-generation new radio frequency range 2 communication. In the proposed design, gain controllability is realized by combining the in-phase main and current-steering path signals through a transformer load whose coupling coefficient is less than unity. Additionally, the noise contribution from cascode devices can be diminished through a transformer-based noise cancelling technique in low-gain modes. Consequently, an enhanced noise performance is achieved as the gain of the VGLNA is lowered. The proposed design is fabricated in a 65-nm CMOS process. At 28 GHz, the implemented VGLNA attains gains and noise figures of 12.1 to 2.7 dB and 3.55 to 4.3 dB, respectively. The design draws a bias current of 10.6 mA with a 1 V nominal supply and occupies a die size of 0.13 mm2, excluding bonding pads.INDEX TERMS Complementary metal-oxide-semiconductor (CMOS), current-steering, fifth-generation (5G) new radio (NR), frequency range 2 (FR2), low-noise amplifier (LNA), noise cancelling, transformer, variable-gain amplifier (VGA).JUNGHWAN HAN (Member, IEEE) received the B. S. degree (Hons.

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A K-Band Variable Gain Low-Noise Amplifier with Low Phase Variation in 65-nm CMOS

Cited by 3 publications

References 4 publications

A 0.38 V Fully Differential K-Band LNA with Transformer-Based Matching Networks

A 0.38 V Fully Differential K-Band LNA with Transformer-Based Matching Networks

A 31–36 GHz low noise‐variable gain amplifier with less than 0.37° RMS phase error and 0.4 dB gain step in 65‐nm CMOS

CMOS Variable-Gain Low-Noise Amplifier Adopting Transformer-Based Noise Cancelling Technique for 5G NR FR2 Applications

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