A loodB+ SFDR 80MSPS 14 bit 0.35μm BiCMOS pipeline

Bardsley, Scott; Dillon, Chris; Kummaraguntla, R.; Lane, C.; Ali, Ahmed; Rigsbee, B.; Combs, Darren

doi:10.1109/bipol.2005.1555219

Cited by 2 publications

(2 citation statements)

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“…The measured ADC results are summarized in Table I. The reported performance of 8-bit high speed pipelined ADCs are compared in Table II in which the figure of merit (FOM) is defined as (20) where is power consumption and is sampling frequency. The FOM of this work is 0.74 pJ/converstion, which is comparable with other reports in similar technologies.…”

Section: Measured Resultsmentioning

confidence: 99%

“…Although a dedicated front-end S/H circuit can be removed and the sampling function is performed in the first stage of a pipelined ADC, the input capacitance of the pipelined ADC in such an implementation is significantly increased due to the multibit first-stage configuration [20], [21]. A large input capacitance stresses the driving circuit of the ADC, such as a variable gain amplifier (VGA) in digital receiver applications.…”

Section: A Mixed-mode S/h Circuitmentioning

confidence: 99%

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An 8-bit 200-MSample/s Pipelined ADC With Mixed-Mode Front-End S/H Circuit

Jiang

Anh

Yeo

et al. 2008

IEEE Trans. Circuits Syst. I

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This paper describes an 8-bit pipelined analog-to-digital converter (ADC) using a mixed-mode sample-and-hold (S/H) circuit at the front-end. The mixed-mode sampling technique reduces signal swings in pipelined ADCs while maintaining the signal-to-noise ratio. The reduction of signal swings relaxes the operational amplifier (opamp) gain, slew rate, bandwidth, and capacitor-matching requirements in pipelined ADCs. Due to the mixed-mode S/H technique, the single-stage opamps and small capacitor sizes can be used in this pipelined ADC, leading to a high speed and low-power consumption. Fabricated in a 0.18-m CMOS process, the 8-bit pipelined ADC consumes 22 mW with 1.8-V supply voltage. When sampling at 200 MSample/s, the prototype ADC achieves 54-dB spurious free dynamic range and 45-dB signal-to-noise and distortion ratio. The measured integral nonlinearity and differential nonlinearity are 0.34 LSB and 0.3 LSB, respectively.

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Section: Measured Resultsmentioning

confidence: 99%

Section: A Mixed-mode S/h Circuitmentioning

confidence: 99%